aboutsummaryrefslogtreecommitdiffstats
path: root/src/synth/synth-expr.adb
Commit message (Collapse)AuthorAgeFilesLines
...
* synth: subtype conversion for selected elements.Tristan Gingold2019-09-261-1/+2
|
* synth: fix handling of single-bit memories.Tristan Gingold2019-09-261-1/+2
|
* synth: fix crash on slice of slice.Tristan Gingold2019-09-251-1/+2
|
* synth: handle array equality (for constances).Tristan Gingold2019-09-251-1/+8
|
* synth: fixes after previous patch.Tristan Gingold2019-09-251-3/+2
|
* synth: rework type for expression.Tristan Gingold2019-09-251-154/+64
|
* testsuite/synth: add testcase for previous commit.Tristan Gingold2019-09-221-0/+1
|
* synth: handle subtype conversions on interfaces.Tristan Gingold2019-09-221-6/+29
|
* synth: introduce type_unbounded_vector.Tristan Gingold2019-09-221-9/+41
|
* synth: preliminary work for subtype conversions on interfaces.Tristan Gingold2019-09-221-4/+9
|
* synth: fix tgingold/ghdlsynth-beta#27Tristan Gingold2019-09-211-1/+2
|
* synth: fold addition on constant nets.Tristan Gingold2019-09-171-38/+75
|
* synth: initialize subprogram variables.Tristan Gingold2019-09-131-1/+1
|
* synth: remove get_width from synth-exprTristan Gingold2019-09-121-11/+0
|
* synth: extract synth-oper from synth-exprTristan Gingold2019-09-121-926/+1
|
* synth: handle simple_aggregate.Tristan Gingold2019-09-121-0/+41
|
* synth: handle unsigned shift rightTristan Gingold2019-09-111-0/+7
|
* synth: handle unsigned shift left.Tristan Gingold2019-09-111-4/+23
|
* synth: add synth_compare_sgn_sgnTristan Gingold2019-09-111-0/+23
|
* synth: handle constant bit compare.Tristan Gingold2019-09-111-0/+6
|
* synth: handle numeric_std.resize for signed.Tristan Gingold2019-09-111-0/+15
|
* synth: move synth_user_function_call to synth-stmts.Tristan Gingold2019-09-111-57/+0
|
* synth: improve support of slices.Tristan Gingold2019-09-111-50/+54
|
* synth: introduce slice type.Tristan Gingold2019-09-111-1/+5
|
* synth: Add width field in type_type record.Tristan Gingold2019-09-111-67/+42
|
* synth: handle alias (WIP, read only).Tristan Gingold2019-09-111-1/+2
|
* synth: add const_sb32, add smul/umul.Tristan Gingold2019-09-071-6/+35
|
* synth-expr: fix regression of issue 7Tristan Gingold2019-09-061-1/+2
|
* synth: handle const record aggregates.Tristan Gingold2019-09-051-8/+25
|
* synth: add value_const_array.Tristan Gingold2019-09-051-11/+30
|
* synth: subtype conversion before compare.Tristan Gingold2019-09-031-2/+7
|
* vhdl synth: recognize more operators (add uns log).Tristan Gingold2019-09-021-7/+56
|
* synth: improve synth_uresize.Tristan Gingold2019-08-311-25/+24
|
* synth: add physical division (#904)tgingold2019-08-301-1/+11
|\ | | | | | | | | | | * synth: added division of physical type * testsuite/synth: added test for the physical division
| * synth: added division of physical typeMartin Doerfelt2019-08-301-1/+11
| |
* | synth: add support for --synth on llvm, link with -lm.Tristan Gingold2019-08-301-0/+4
| |
* | vhdl: recognize 1164 condition operator, handle in synth.Tristan Gingold2019-08-301-0/+2
| |
* | synth: handle enumeration subtype in ranges.Tristan Gingold2019-08-301-1/+2
| |
* | synth: fix named association in record aggregate.Tristan Gingold2019-08-301-1/+3
|/
* synth: add support for record types.Tristan Gingold2019-08-291-2/+84
| | | | (WIP: need to fix regression of stmt01).
* synth: Integer operators (#902)marph912019-08-281-0/+16
| | | | | | | | * synth: added missing integer operators I. e. inequality and remainder. * testsuite/synth: added testcase for the missing integer operators
* synth: rework partial assignmentsTristan Gingold2019-08-271-1/+0
|
* synth: add support for constant exponentiation.Tristan Gingold2019-08-201-0/+10
|
* initial support for reduce and/or (#900)Pepijn de Vos2019-08-201-0/+15
|
* synth: handle array attribute "length" (#895)marph912019-08-191-0/+10
|
* synth: handle integer values in subtype conversion.Tristan Gingold2019-08-161-0/+2
| | | | For tgingold/ghdlsynth-beta#33
* synth: handle array attributes; handle integer subtypes in generics.Tristan Gingold2019-08-161-1/+89
| | | | Fix tgingold/ghdlsynth-beta#32
* add synthesis support for logic operators on numeric types (#893)Pepijn de Vos2019-08-151-4/+24
| | | | | | | | * add logic operators on unsigned * handle signed too * handle unary not
* synth: also extract edge in PSL expressions.Tristan Gingold2019-08-131-14/+10
|
* synth: handle 1 bit integer in disp_vhdl, fix range in synth-expr.Tristan Gingold2019-08-081-1/+1
|