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| author | Tristan Gingold <tgingold@free.fr> | 2019-09-13 07:28:10 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-09-13 07:28:10 +0200 |
| commit | 2e61401a3d12ede4bb72bc6749d7f6ae905d6376 (patch) | |
| tree | a26d4b8c1fc57882cb5ce9e1fb108b68735278c3 /src/synth/synth-expr.adb | |
| parent | 8f0227416720253cabacff0d0cb9ced2f660f981 (diff) | |
| download | ghdl-2e61401a3d12ede4bb72bc6749d7f6ae905d6376.tar.gz ghdl-2e61401a3d12ede4bb72bc6749d7f6ae905d6376.tar.bz2 ghdl-2e61401a3d12ede4bb72bc6749d7f6ae905d6376.zip | |
synth: initialize subprogram variables.
Diffstat (limited to 'src/synth/synth-expr.adb')
| -rw-r--r-- | src/synth/synth-expr.adb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb index 9ec249193..a4837e65b 100644 --- a/src/synth/synth-expr.adb +++ b/src/synth/synth-expr.adb @@ -95,7 +95,7 @@ package body Synth.Expr is end From_Bit; procedure To_Logic - (Enum : Int64; Etype : Type_Acc; Val : out Uns32; Zx : out Uns32) is + (Enum : Int64; Etype : Type_Acc; Val : out Uns32; Zx : out Uns32) is begin if Etype = Logic_Type then From_Std_Logic (Enum, Val, Zx); |