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* dyn_tables: move Table_Initial generic to argument ofTristan Gingold2019-11-111-2/+6
* synth: move net_table to netlists-utils.Tristan Gingold2019-11-111-0/+10
* synth: do more constant propagation (on build2Tristan Gingold2019-11-051-0/+6
* netlists-utils: add clog2Tristan Gingold2019-11-031-0/+2
* synth: create build2_concat from netlists-concat.Tristan Gingold2019-10-271-1/+0
* synth: rewrite cleanup pass.Tristan Gingold2019-10-101-7/+0
* synth: fold addition on constant nets.Tristan Gingold2019-09-171-0/+1
* synth: minor refactoring about const gates.Tristan Gingold2019-09-151-1/+1
* synth: rework partial assignmentsTristan Gingold2019-08-271-0/+7
* add port width utility function for yosys (#876)Pepijn de Vos2019-07-211-0/+3
* synth: disp_vhdl: merge literals.Tristan Gingold2019-06-281-0/+3
* synth: Move get_input_net to netlists.utils.Tristan Gingold2019-06-281-0/+2
* synth: defer gates removal after at end of entity synthesis.Tristan Gingold2017-02-151-0/+6
* Add netlist generation infrastructure.Tristan Gingold2017-01-311-0/+44
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