iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Move sources to src/ subdirectory.	Tristan Gingold	2014-11-04	1	-4837/+0
*	Add a python script to automatically generate disp_tree.	Tristan Gingold	2014-09-25	1	-10/+11
*	First run (using mcode) of OSVVM_2014_01.	Tristan Gingold	2014-09-05	1	-110/+110
*	Fix ghdl_simul (after previous change).	Tristan Gingold	2014-09-03	1	-6/+8
*	Keep names in the tree.	Tristan Gingold	2014-09-02	1	-33/+59
*	Replace architecture_declaration by architecture_body to follow lrm.	Tristan Gingold	2014-07-19	1	-1/+1
*	Handle character literals like simple names.	Tristan Gingold	2014-07-19	1	-0/+1
*	vhdl 2008: visibility, more implicit subprograms, alias...	Tristan Gingold	2014-07-17	1	-66/+521
*	Add many vhdl08 predefined operators and functions. Add std.env	Tristan Gingold	2014-06-30	1	-13/+29
*	simulate: fix function call during elaboration of protected object.	Tristan Gingold	2014-06-28	1	-110/+104
*	simulate: fix nbr_objects, improve display of arrays.	Tristan Gingold	2014-06-27	1	-2/+15
*	Use library unit instead of design unit.	Tristan Gingold	2014-06-24	1	-13/+14
*	simulate: rework configuration, add stats.	Tristan Gingold	2014-06-21	1	-88/+131
*	Add interpreted simulator.	Tristan Gingold	2014-06-15	1	-0/+4285