| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | vhdl: recognize 1164 condition operator, handle in synth. | Tristan Gingold | 2019-08-30 | 2 | -109/+118 |
| * | synth: handle verification units. | Tristan Gingold | 2019-08-20 | 2 | -245/+253 |
| * | vhdl: parse verification unit (WIP). | Tristan Gingold | 2019-08-17 | 1 | -242/+243 |
| * | vhdl: declare verification units (WIP). | Tristan Gingold | 2019-08-16 | 3 | -479/+510 |
| * | vhdl: recognize PSL units reserved words. | Tristan Gingold | 2019-08-16 | 3 | -723/+745 |
| * | vhdl: remove unused Get/Set_Choice_Order. | Tristan Gingold | 2019-08-09 | 2 | -276/+268 |
| * | Add support for PSL assumptions, used in formal verification (#880) | Pepijn de Vos | 2019-08-07 | 2 | -110/+117 |
| * | python: regenerate files. | Tristan Gingold | 2019-07-26 | 3 | -287/+302 |
| * | libghdl: import Free_Dependence_List. | Tristan Gingold | 2019-07-11 | 1 | -0/+2 |
| * | python: add errorout_console, disp_config. | Tristan Gingold | 2019-07-08 | 1 | -0/+3 |
| * | Fix a merge collision. | Tristan Gingold | 2019-07-08 | 1 | -154/+84 |
| * | vhdl: rename Cover_Statement to Cover_Directive. | Tristan Gingold | 2019-07-04 | 1 | -3/+3 |
| * | vhdl: parse and analyze restrict directive. | Tristan Gingold | 2019-07-04 | 2 | -21/+96 |
| * | vhdl: add anonymous_signal_declaration. | Tristan Gingold | 2019-07-03 | 2 | -340/+401 |
| * | python: add __init__.py files. | Tristan Gingold | 2019-06-25 | 2 | -0/+0 |
| * | libraries.py: add more bindings. | Tristan Gingold | 2019-06-24 | 1 | -0/+4 |
| * | Rework libghdl build/install procedure (#840) | 1138-4EB | 2019-06-17 | 24 | -0/+5540 |
