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* revert "doc: temporarily pin docutils to 0.16, due to theme compatibility iss...umarcor2021-09-041-1/+0
* testsuite/gna: add a test for #1836Tristan Gingold2021-09-033-0/+65
* vhdl/translate: adjust slice names for unbounded arrays. Fir #1836Tristan Gingold2021-09-033-4/+25
* vhdl-scanner.adb: add commentsTristan Gingold2021-09-031-0/+6
* ci: update comment about regenerating Python bindingsumarcor2021-09-021-1/+1
* testsuite/gna: check last commit (psl abort) for #1654Tristan Gingold2021-09-022-1/+3
* vhdl,psl: abort is now identical to async_abort. For #1654Tristan Gingold2021-09-022-6/+4
* testsuite/synth: add a test for previous commit. For #1850Tristan Gingold2021-09-012-0/+131
* synth-vhdl_stmts.adb: do not expect configuration for vunit.Tristan Gingold2021-09-011-3/+3
* Test.yml: explain how to regenerate the python bindingTristan Gingold2021-08-311-0/+1
* testsuite/synth: add a test for #1654Tristan Gingold2021-08-313-0/+132
* synth: handle PSL async_abort and sync_abort. For #1654Tristan Gingold2021-08-313-10/+44
* testsuite/gna: add a test for #1654Tristan Gingold2021-08-303-0/+255
* trans-chap9.adb: handle async_abort, sync_abort. Fix #1654Tristan Gingold2021-08-306-145/+272
* vhdl and psl: parse sync_abort and async_abort. For #1654Tristan Gingold2021-08-3022-186/+359
* pyGHDL: update errorout.pyTristan Gingold2021-08-291-4/+5
* testsuite/gna: add a test for Wuseless warning. For #1832Tristan Gingold2021-08-292-0/+26
* vhdl-canon: detect PSL assertion that cannot fail. For #1832Tristan Gingold2021-08-292-3/+17
* testsuite/synth: add a test for #1832Tristan Gingold2021-08-292-0/+29
* synth-vhdl_stmts: fix a crash on never triggered PSL assertion.Tristan Gingold2021-08-291-0/+6
* synth: improve result of is_positiveTristan Gingold2021-08-294-10/+15
* netlists-inference: improve location for dff.Tristan Gingold2021-08-291-1/+1
* synth: factorize code to create base instanceTristan Gingold2021-08-287-57/+104
* synthesis.adb: abstract instance_passesTristan Gingold2021-08-283-23/+34
* synth-environment: add subprograms for signals (preliminary work)Tristan Gingold2021-08-282-5/+110
* synth-memtype: export conversion functionsTristan Gingold2021-08-282-7/+9
* synth: add build2_concat2 and use it for vhdl concat.Tristan Gingold2021-08-283-4/+18
* ghdlsynth: add debug option for elaborationTristan Gingold2021-08-282-1/+8
* synth-vhdl_decls.adb: add commentsTristan Gingold2021-08-281-0/+4
* vhdl: handle foreign units in libraries and configurationTristan Gingold2021-08-283-24/+45
* errorout: do not display empty linesTristan Gingold2021-08-283-1/+14
* netlists-disp_verilog: handle initial value for idff and isignalTristan Gingold2021-08-281-8/+18
* pyGHDL.dom: improvements (#1848)Unai Martinez-Corral2021-08-275-19/+64
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| * Updated requirements to pyVHDLModel v0.12.0.Patrick Lehmann2021-08-271-2/+2
| * Handle sensitivity lists.Patrick Lehmann2021-08-271-4/+3
| * Added concurrent (PSL) assertion.Patrick Lehmann2021-08-263-5/+35
| * Translate sequential procedure calls.Patrick Lehmann2021-08-263-7/+8
| * Implemented handling off null statements.Patrick Lehmann2021-08-264-6/+21
* | testsuite/synth: add a test for #1850Tristan Gingold2021-08-273-0/+82
* | vhdl-parse: support for-generate in vunits. Fix #1850Tristan Gingold2021-08-271-2/+10
* | testsuite/synth: Add a test for ghdl/ghdl-yosys-plugin#154Tristan Gingold2021-08-272-0/+58
* | synth: do not remove signals with a keep attribute.Tristan Gingold2021-08-272-1/+31
* | std_names: add name keep.Tristan Gingold2021-08-273-183/+186
* | netlists-disp_verilog: fix handling of unconnected portTristan Gingold2021-08-261-3/+1
* | ghdlsynth.adb: fix a typoTristan Gingold2021-08-261-1/+1
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* testsuite/gna: add a test for #1832Tristan Gingold2021-08-262-0/+132
* PSL: handle inf in star repeat sequence. Fix #1832Tristan Gingold2021-08-269-11/+44
* testsuite/gna: add a reproducer for #1834Tristan Gingold2021-08-263-0/+59
* vhdl-evaluation: check integer evaluations fit in base type. Fix #1834Tristan Gingold2021-08-262-11/+37
* testsuite/synth: add a test for #1838Tristan Gingold2021-08-252-0/+48
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