iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	files_map: add Discard_Source_File, Free_Source_File,	Tristan Gingold	2019-11-06	3	-5/+47
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*	files_map-editor: turn Replace_Text to a function.	Tristan Gingold	2019-11-06	3	-30/+39
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*	vhdl-ieee-std_logic_1164: minor simplification.	Tristan Gingold	2019-11-06	1	-21/+8
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*	synth: handle edge operators in synth_predefined_function_call.	Tristan Gingold	2019-11-06	4	-31/+24
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*	vhdl: recognize rising_edge/falling_edge.	Tristan Gingold	2019-11-06	4	-381/+393
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*	netlists-dump: avoid a crash on unconnected driver.	Tristan Gingold	2019-11-06	1	-3/+6
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*	testsuite/synth: add a similar testcase for #1009	Tristan Gingold	2019-11-06	2	-0/+16
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*	synth: do not create a value_const of a value_const.	Tristan Gingold	2019-11-06	2	-1/+6
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*	Add testcase for #1009	Tristan Gingold	2019-11-06	2	-0/+25
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*	synth-expr: do subtype conversion in fill_record_aggregate. Fix #1009	Tristan Gingold	2019-11-06	1	-1/+2
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*	Add testcase for #1006	Tristan Gingold	2019-11-06	3	-0/+46
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*	synth: unshare default value of variables. Fix #1006	Tristan Gingold	2019-11-06	2	-4/+42
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*	netlists-cleanup: do not remove the self-instance.	Tristan Gingold	2019-11-06	1	-0/+2
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*	synth-stmts: rewrite target_info to clarify memory	Tristan Gingold	2019-11-05	1	-18/+56
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*	synth: do more constant propagation (on build2	Tristan Gingold	2019-11-05	4	-50/+82
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*	netlists-disp_vhdl: handle truncate to width 1.	Tristan Gingold	2019-11-05	1	-2/+7
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*	netlists-memories: truncate wide addresses.	Tristan Gingold	2019-11-05	1	-11/+9
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*	synth-oper: simplify code.	Tristan Gingold	2019-11-05	1	-7/+4
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*	netlists: add build2_sresize, simplify code.	Tristan Gingold	2019-11-05	3	-48/+53
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*	testsuite/synth: fix permissions.	Tristan Gingold	2019-11-05	1	-0/+0
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*	synth: extract netlists-folds from netlists-builders.	Tristan Gingold	2019-11-05	11	-160/+216
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*	netlists-dump: indent output.	Tristan Gingold	2019-11-05	3	-13/+17
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*	netlists-memories: adjust message.	Tristan Gingold	2019-11-05	1	-1/+1
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*	testsuite/synth: add testcase for #1002.	Tristan Gingold	2019-11-04	2	-0/+26
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*	netlists: enable expansion.	Tristan Gingold	2019-11-04	1	-1/+1
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*	synth-oper: handle constant not.	Tristan Gingold	2019-11-04	1	-3/+8
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*	synth-expr: allow constants in discrete range	Tristan Gingold	2019-11-04	1	-0/+2
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*	testsuite/synth: add a test for previous commit.	Tristan Gingold	2019-11-04	3	-0/+56
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*	synth-expr: handle vhdl 2008 aggregates (partially).	Tristan Gingold	2019-11-04	2	-48/+125
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*	synth-value: export get_bound_length.	Tristan Gingold	2019-11-04	1	-0/+3
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*	ghdlmain: simplify code.	Tristan Gingold	2019-11-04	1	-4/+1
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*	vhdl-scanner: handle 'synopsys' pragma.	Tristan Gingold	2019-11-04	3	-16/+19
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*	ghdlmain: fix deallocation in response file handling.	Tristan Gingold	2019-11-04	1	-0/+10
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*	Add doc of the 3 ways to use PSL with GHDL (Implementation of VHDL -> PSL ↵	T. Meissner	2019-11-03	1	-15/+84
\| \| \| \|	implementation) (#996)
*	netlists-expands: expand rol.	Tristan Gingold	2019-11-03	1	-0/+30
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*	synth-oper: use build2_uresize	Tristan Gingold	2019-11-03	1	-16/+2
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*	netlists-utils: add clog2	Tristan Gingold	2019-11-03	2	-0/+8
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*	netlists-builders: add build2_uresize.	Tristan Gingold	2019-11-03	2	-0/+31
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*	synth: fix multiport read memories (for issue #1000)	Tristan Gingold	2019-11-03	1	-1/+3
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*	testsuite/synth: add a test for ram/rom.	Tristan Gingold	2019-11-03	5	-0/+154
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*	testsuite/synth: add test for tgingold/ghdlsynth-beta#56	Tristan Gingold	2019-11-03	3	-0/+58
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*	testsuite/synth/memmux01: add a test	Tristan Gingold	2019-11-03	3	-1/+98
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*	testsuite/synth/var01: add more tests.	Tristan Gingold	2019-11-03	8	-2/+233
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*	synth: cap max in synth_slice_suffix	Tristan Gingold	2019-11-03	1	-1/+8
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*	netlists-expands: rewrite generate_muxes.	Tristan Gingold	2019-11-03	1	-24/+102
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*	testsuite/synth: add memmux04 test.	Tristan Gingold	2019-11-03	3	-1/+75
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*	netlists-expands: use a safe walk.	Tristan Gingold	2019-11-03	1	-1/+3
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*	Install source of std.standard package to respective VHDL standard version ↵	Torsten Maehne	2019-11-02	1	-3/+3
\| \| \| \|	sub-directories (#995)
*	testsuite/synth: add a test for inout variable	Tristan Gingold	2019-11-01	3	-0/+64
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*	synth: add support for inout variable interfaces.	Tristan Gingold	2019-11-01	2	-3/+4
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