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* testsuite/gna: add reproducer for #1404Tristan Gingold2020-08-264-0/+65
* trans-rtis: adjust max_depth of records. For #1404Tristan Gingold2020-08-261-3/+7
* grt-disp_signals: add code to display last value (disabled).Tristan Gingold2020-08-261-0/+8
* testsuite/gna: add a test for #1440Tristan Gingold2020-08-262-0/+50
* vhdl/translate: handle vhdl-93 'last_value. Fix #1440Tristan Gingold2020-08-266-75/+207
* Replace distutils with setuptoolsNicola Corna2020-08-251-1/+1
* Remove unused 'import distutils.command.build_py'Nicola Corna2020-08-251-1/+0
* testsuite/gna: add reproducer for #1440Tristan Gingold2020-08-252-0/+28
* testsuite/synth: add a test for ghdl/ghdl-yosys-plugin#129Tristan Gingold2020-08-253-0/+55
* synth-stmts: convert the waveform to the target subtype.Tristan Gingold2020-08-251-7/+13
* testsuite/gna: add a test for #1429Tristan Gingold2020-08-252-0/+48
* vhdl-evaluation: make eval_dyadic_bit_array_operator more generic.Tristan Gingold2020-08-251-42/+71
* testsuite/gna: add a testcase from #1389Tristan Gingold2020-08-252-0/+37
* ci: add black --checkeine2020-08-231-2/+19
* python: execute 'black'eine2020-08-2331-1673/+1585
* py: adjust blank lines to PEP 8 for vhdl_langserver (#1434)m-kru2020-08-158-2/+25
* vendors: update compile-uvvm.sh Fix #1393Tristan Gingold2020-08-081-4/+13
* testsuite/gna: add a test for #1412Tristan Gingold2020-08-082-0/+24
* vhdl-sem_names: check name staticness of signal attributes. Fix #1412Tristan Gingold2020-08-081-58/+79
* vhdl-canon: minor cleanup.Tristan Gingold2020-08-082-61/+0
* vhdl: renaming in vhdl-canon.Tristan Gingold2020-08-085-188/+202
* testsuite/synth: add tests for std_logic_unsigned and std_logic_signed.Tristan Gingold2020-08-0734-0/+1122
* testsuite/synth: add more tests for std_logic_arithTristan Gingold2020-08-079-1/+371
* synth-oper: handle operators of std_logic_unsigned.Tristan Gingold2020-08-071-65/+99
* synth-oper: handle more std_logic_arith operators.Tristan Gingold2020-08-071-226/+180
* vhdl: recognize more operators for std_logic_unsigned/signed.Tristan Gingold2020-08-073-206/+328
* vhdl: recognize more std_logic_arith operators.Tristan Gingold2020-08-076-327/+436
* doc: debugging with LLVM >=6 is supportedeine2020-08-071-1/+1
* testsuite/gna: add a test for #887Tristan Gingold2020-08-073-0/+125
* testsuite/gna: add a test for #961Tristan Gingold2020-08-072-0/+116
* testsuite/gna: add test for #922Tristan Gingold2020-08-072-0/+33
* netlists: preliminary support of memory of depth one.Tristan Gingold2020-08-061-2/+0
* testsuite/synth: add a test for #1426Tristan Gingold2020-08-062-0/+63
* synth: handle an operation from std_logic_unsigned. For #1426Tristan Gingold2020-08-061-1/+2
* testsuite/synth: add tests for std_logic_arithTristan Gingold2020-08-0617-0/+1055
* synth-oper: handle more operations for std_logic_arith. For #1426Tristan Gingold2020-08-062-142/+339
* trans-chap6: fix reuse violation of a node.Tristan Gingold2020-08-061-0/+1
* synth-oper: propagate errors from unsupported operations.Tristan Gingold2020-08-061-2/+7
* synth-disp_vhdl: minor output indentation fix.Tristan Gingold2020-08-061-1/+1
* synth-oper: handle < for enums.Tristan Gingold2020-08-061-0/+2
* testsuite/synth: add test for #1421Tristan Gingold2020-08-065-0/+92
* synth: push extract on mux2 for inference. For #1421Tristan Gingold2020-08-063-17/+52
* testsuite/gna: improve testing.Tristan Gingold2020-08-052-1/+7
* vhdl-sem_names: use element type of prefix type for indexed names.Tristan Gingold2020-08-052-10/+16
* ortho/debug: fix type of indexed_name.Tristan Gingold2020-08-051-2/+4
* grt: import changes from gtkwave to ghwlibTristan Gingold2020-08-052-1/+8
* testsuite/gna: add a test for #852Tristan Gingold2020-08-053-44/+71
* ghwlib: minor change to verbose.Tristan Gingold2020-08-051-1/+1
* testsuite/gna: add a test for #1131Tristan Gingold2020-08-055-0/+112
* grt: adjust previous patch on grt-wavesTristan Gingold2020-08-054-20/+35
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