iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
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*	synth: add a dff test.	Tristan Gingold	2019-07-31	3	-1/+65
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*	synth: refactoring in synth-inference.	Tristan Gingold	2019-07-31	1	-129/+137
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*	synth: add location on monadic operators.	Tristan Gingold	2019-07-31	1	-7/+10
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*	synth: regenerate ghdlsynth_gates.h	Tristan Gingold	2019-07-31	1	-3/+4
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*	synth: fix a crash in instantiation.	Tristan Gingold	2019-07-31	2	-8/+9
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*	synth: add a counter test.	Tristan Gingold	2019-07-30	3	-0/+117
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*	synth: slightly improve output for indexes.	Tristan Gingold	2019-07-30	1	-3/+7
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*	synth: add dpram3 test.	Tristan Gingold	2019-07-30	3	-1/+77
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*	synth: adjust output for dyn_insert, add dpram2 test.	Tristan Gingold	2019-07-30	4	-3/+67
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*	synth: add a test for a ram.	Tristan Gingold	2019-07-30	3	-1/+65
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*	synth: fixes for indexed names.	Tristan Gingold	2019-07-30	3	-3/+13
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*	synth: add a test for idff.	Tristan Gingold	2019-07-30	3	-1/+74
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*	synth: rework indexed names.	Tristan Gingold	2019-07-30	4	-101/+106
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*	synth: add a test for psl.	Tristan Gingold	2019-07-29	2	-0/+38
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*	synth: handle more conversions in disp_vhdl	Tristan Gingold	2019-07-29	1	-1/+44
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*	synth: add arr02 test.	Tristan Gingold	2019-07-29	3	-0/+73
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*	synth: add support for memories.	Tristan Gingold	2019-07-29	15	-152/+445
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*	synth: remove extract_bound (trivial).	Tristan Gingold	2019-07-28	5	-15/+6
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*	synth: unconstrained arrays.	Tristan Gingold	2019-07-28	5	-17/+71
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*	synth: preliminary support of dynamic indexing.	Tristan Gingold	2019-07-28	13	-740/+956
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*	vhdl: add tests for concat.	Tristan Gingold	2019-07-26	5	-0/+99
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*	vhdl: linearize analyze and evaluation of concat operators.	Tristan Gingold	2019-07-26	5	-360/+647
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*	python: regenerate files.	Tristan Gingold	2019-07-26	3	-287/+302
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*	testenv.sh: improve comment.	Tristan Gingold	2019-07-26	1	-1/+1
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*	synth: rework range.	Tristan Gingold	2019-07-26	5	-48/+52
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*	synth: preliminary support of integer subtypes.	Tristan Gingold	2019-07-26	8	-42/+68
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*	synth: handle array aggregate.	Tristan Gingold	2019-07-26	2	-27/+32
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*	synth: handle bit.	Tristan Gingold	2019-07-25	3	-4/+11
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*	synth: array inequality, integer in choices.	Tristan Gingold	2019-07-25	2	-0/+11
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*	vhdl+synth: recognize /= to std_logic_unsigned.	Tristan Gingold	2019-07-25	3	-1/+16
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*	vhdl: handle (discard) more pragmas.	Tristan Gingold	2019-07-25	3	-1/+19
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*	synth: save and display locations for instances.	Tristan Gingold	2019-07-25	8	-66/+247
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*	synth: add test for previous commit.	Tristan Gingold	2019-07-25	3	-1/+49
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*	synth: fix incorrect slice in disp_vhdl for Insert.	Tristan Gingold	2019-07-25	1	-6/+1
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*	synth: add testcase for previous commit.	Tristan Gingold	2019-07-24	3	-0/+68
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*	vhdl annotations: fix annotation of type in interface list.	Tristan Gingold	2019-07-24	1	-0/+1
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*	synth: add testcase for previous commit.	Tristan Gingold	2019-07-24	5	-0/+114
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*	synth: fix bad ordering in case statement.	Tristan Gingold	2019-07-24	1	-2/+3
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*	synth: add testcase for pragma translate_off.	Tristan Gingold	2019-07-24	4	-0/+69
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*	synth: do not consider (unrecognized) ieee functions as user functions.	Tristan Gingold	2019-07-24	1	-0/+19
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*	synth: enable handling of pragma translate_on/off.	Tristan Gingold	2019-07-24	1	-0/+3
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*	vhdl scanner: handle pragma translate_on/translate_off.	Tristan Gingold	2019-07-24	5	-5/+109
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*	synth: handle resize.	Tristan Gingold	2019-07-24	1	-0/+15
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*	synth: handle record type declarations.	Tristan Gingold	2019-07-24	1	-1/+11
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*	vhdl: recognize resize function.	Tristan Gingold	2019-07-24	4	-3/+43
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*	synth: add testcase for previous commit.	Tristan Gingold	2019-07-23	3	-0/+81
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*	synth: fix slice/indexed assignment that partially override previous assign.	Tristan Gingold	2019-07-23	1	-5/+8
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*	synth: add more operators.	Tristan Gingold	2019-07-23	1	-1/+34
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*	synth: fix to_unsigned.	Tristan Gingold	2019-07-23	1	-2/+2
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*	synth: use original entity to display netlist.	Tristan Gingold	2019-07-23	7	-22/+314
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