aboutsummaryrefslogtreecommitdiffstats
path: root/testsuite/synth
diff options
context:
space:
mode:
Diffstat (limited to 'testsuite/synth')
-rw-r--r--testsuite/synth/aggr02/targ02.vhdl11
-rw-r--r--testsuite/synth/aggr02/tb_targ02.vhdl22
-rwxr-xr-xtestsuite/synth/aggr02/testsuite.sh11
3 files changed, 35 insertions, 9 deletions
diff --git a/testsuite/synth/aggr02/targ02.vhdl b/testsuite/synth/aggr02/targ02.vhdl
new file mode 100644
index 000000000..029918f65
--- /dev/null
+++ b/testsuite/synth/aggr02/targ02.vhdl
@@ -0,0 +1,11 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity targ02 is
+ port (o0, o1, o2 : out std_logic);
+end targ02;
+
+architecture behav of targ02 is
+begin
+ (o2, o1, o0) <= std_logic_vector'("001");
+end behav;
diff --git a/testsuite/synth/aggr02/tb_targ02.vhdl b/testsuite/synth/aggr02/tb_targ02.vhdl
new file mode 100644
index 000000000..c63d4188d
--- /dev/null
+++ b/testsuite/synth/aggr02/tb_targ02.vhdl
@@ -0,0 +1,22 @@
+entity tb_targ02 is
+end tb_targ02;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tb_targ02 is
+ signal o0 : std_logic;
+ signal o1 : std_logic;
+ signal o2 : std_logic;
+begin
+ dut: entity work.targ02
+ port map (o0, o1, o2);
+
+ process
+ begin
+ wait for 1 ns;
+ assert o2 = '0' and o1 = '0' and o0 = '1' severity failure;
+
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/synth/aggr02/testsuite.sh b/testsuite/synth/aggr02/testsuite.sh
index 3b545a932..6c7deeb40 100755
--- a/testsuite/synth/aggr02/testsuite.sh
+++ b/testsuite/synth/aggr02/testsuite.sh
@@ -2,15 +2,8 @@
. ../../testenv.sh
-for t in targ01; do
- analyze $t.vhdl tb_$t.vhdl
- elab_simulate tb_$t
- clean
-
- synth $t.vhdl -e $t > syn_$t.vhdl
- analyze syn_$t.vhdl tb_$t.vhdl
- elab_simulate tb_$t
- clean
+for t in targ01 targ02; do
+ synth_tb $t
done
echo "Test successful"