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-rw-r--r--testsuite/gna/bug062/ex.vhdl20
-rwxr-xr-xtestsuite/gna/bug062/testsuite.sh9
2 files changed, 29 insertions, 0 deletions
diff --git a/testsuite/gna/bug062/ex.vhdl b/testsuite/gna/bug062/ex.vhdl
new file mode 100644
index 000000000..9a63931f2
--- /dev/null
+++ b/testsuite/gna/bug062/ex.vhdl
@@ -0,0 +1,20 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity ex is
+ port (clk, en : std_ulogic;
+ r1: std_ulogic;
+ r0: out std_ulogic);
+end ex;
+
+architecture behav of ex is
+begin
+ process(clk)
+ begin
+ if rising_edge(clk) then
+ if en = '1' then
+ r0 <= r1;
+ end if;
+ end if;
+ end process;
+end behav;
diff --git a/testsuite/gna/bug062/testsuite.sh b/testsuite/gna/bug062/testsuite.sh
new file mode 100755
index 000000000..ce437caa3
--- /dev/null
+++ b/testsuite/gna/bug062/testsuite.sh
@@ -0,0 +1,9 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+$GHDL --file-to-xml ex.vhdl > ex.xml
+
+rm -f ex.xml
+
+echo "Test successful"