diff options
Diffstat (limited to 'src/vhdl')
-rw-r--r-- | src/vhdl/vhdl-ieee-math_real.adb | 4 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes.ads | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-ieee-math_real.adb b/src/vhdl/vhdl-ieee-math_real.adb index d62e4c246..1ac5a9b10 100644 --- a/src/vhdl/vhdl-ieee-math_real.adb +++ b/src/vhdl/vhdl-ieee-math_real.adb @@ -44,6 +44,10 @@ package body Vhdl.Ieee.Math_Real is Predef := Iir_Predefined_Ieee_Math_Real_Ceil; when Name_Log2 => Predef := Iir_Predefined_Ieee_Math_Real_Log2; + when Name_Sin => + Predef := Iir_Predefined_Ieee_Math_Real_Sin; + when Name_Cos => + Predef := Iir_Predefined_Ieee_Math_Real_Cos; when others => null; end case; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 10ad3d853..1f65efb0f 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5065,6 +5065,8 @@ package Vhdl.Nodes is -- Math_Real Iir_Predefined_Ieee_Math_Real_Ceil, Iir_Predefined_Ieee_Math_Real_Log2, + Iir_Predefined_Ieee_Math_Real_Sin, + Iir_Predefined_Ieee_Math_Real_Cos, -- Std_Logic_Unsigned (synopsys extension). Iir_Predefined_Ieee_Std_Logic_Unsigned_Add_Slv_Slv, |