diff options
Diffstat (limited to 'src/vhdl/translate')
| -rw-r--r-- | src/vhdl/translate/trans-chap14.adb | 6 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap2.adb | 2 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap3.adb | 18 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap6.adb | 14 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap7.adb | 14 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap8.adb | 28 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap8.ads | 2 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap9.adb | 2 |
8 files changed, 42 insertions, 44 deletions
diff --git a/src/vhdl/translate/trans-chap14.adb b/src/vhdl/translate/trans-chap14.adb index 4618edcb1..35a3152e2 100644 --- a/src/vhdl/translate/trans-chap14.adb +++ b/src/vhdl/translate/trans-chap14.adb @@ -110,7 +110,7 @@ package body Trans.Chap14 is begin -- FIXME: improve code if constraint is a range expression. if Get_Type_Staticness (Atype) = Locally then - if Get_Direction (Cons) = Iir_To xor Is_High then + if Get_Direction (Cons) = Dir_To xor Is_High then return New_Lit (Chap7.Translate_Static_Range_Left (Cons, Atype)); else @@ -307,10 +307,10 @@ package body Trans.Chap14 is Is_Inc := False; when Iir_Kind_Leftof_Attribute => Is_Inc := - Get_Direction (Get_Range_Constraint (Prefix_Type)) = Iir_Downto; + Get_Direction (Get_Range_Constraint (Prefix_Type)) = Dir_Downto; when Iir_Kind_Rightof_Attribute => Is_Inc := - Get_Direction (Get_Range_Constraint (Prefix_Type)) = Iir_To; + Get_Direction (Get_Range_Constraint (Prefix_Type)) = Dir_To; when others => Error_Kind ("translate_succ_pred_attribute", Attr); end case; diff --git a/src/vhdl/translate/trans-chap2.adb b/src/vhdl/translate/trans-chap2.adb index 7badaeafb..84fa35a94 100644 --- a/src/vhdl/translate/trans-chap2.adb +++ b/src/vhdl/translate/trans-chap2.adb @@ -1466,7 +1466,7 @@ package body Trans.Chap2 is | Type_Iir_Pure_State | Type_Iir_Delay_Mechanism | Type_Iir_Predefined_Functions - | Type_Iir_Direction + | Type_Direction_Type | Type_Iir_Int32 | Type_Int32 | Type_Fp64 diff --git a/src/vhdl/translate/trans-chap3.adb b/src/vhdl/translate/trans-chap3.adb index b0f61fe7e..ad6207658 100644 --- a/src/vhdl/translate/trans-chap3.adb +++ b/src/vhdl/translate/trans-chap3.adb @@ -3332,9 +3332,9 @@ package body Trans.Chap3 is -- Constraint is a range expression, therefore, direction is -- known. case Get_Direction (Constr) is - when Iir_To => + when Dir_To => return Gen_Compare_To; - when Iir_Downto => + when Dir_Downto => return Gen_Compare_Downto; end case; end if; @@ -3776,18 +3776,16 @@ package body Trans.Chap3 is New_Lit (Chap7.Translate_Static_Range_Dir (Range_Constr))); case Get_Direction (Range_Constr) is - when Iir_To => + when Dir_To => Op := ON_Add_Ov; - when Iir_Downto => + when Dir_Downto => Op := ON_Sub_Ov; end case; - Start_If_Stmt - (If_Blk, - New_Compare_Op (ON_Eq, - New_Obj_Value (Length), - New_Lit (Ghdl_Index_0), - Ghdl_Bool_Type)); + Start_If_Stmt (If_Blk, New_Compare_Op (ON_Eq, + New_Obj_Value (Length), + New_Lit (Ghdl_Index_0), + Ghdl_Bool_Type)); -- Null range. New_Assign_Stmt (M2Lv (Range_To_Left (Res_Range)), diff --git a/src/vhdl/translate/trans-chap6.adb b/src/vhdl/translate/trans-chap6.adb index 433669663..ec632c815 100644 --- a/src/vhdl/translate/trans-chap6.adb +++ b/src/vhdl/translate/trans-chap6.adb @@ -232,7 +232,7 @@ package body Trans.Chap6 is Bound := M2E (Chap3.Range_To_Left (Rng)); if Deep_Rng /= Null_Iir then - if Get_Direction (Deep_Rng) = Iir_To xor Deep_Reverse then + if Get_Direction (Deep_Rng) = Dir_To xor Deep_Reverse then -- Direction TO: INDEX - LEFT. New_Assign_Stmt (New_Obj (Off), New_Dyadic_Op (ON_Sub_Ov, @@ -321,7 +321,7 @@ package body Trans.Chap6 is end if; V := Eval_Pos (Expr1); - if Get_Direction (Index_Range) = Iir_To then + if Get_Direction (Index_Range) = Dir_To then B := V - B; else B := B - V; @@ -331,7 +331,7 @@ package body Trans.Chap6 is Index_Base_Type := Get_Base_Type (Index_Type); Index := Chap7.Translate_Expression (Expr, Index_Base_Type); - if Get_Direction (Index_Range) = Iir_To then + if Get_Direction (Index_Range) = Dir_To then -- Direction TO: INDEX - LEFT. if B /= 0 then Obound := Chap7.Translate_Static_Range_Left @@ -582,9 +582,9 @@ package body Trans.Chap6 is else -- Both prefix and slice are thin array. case Get_Direction (Index_Range) is - when Iir_To => + when Dir_To => Off := Slice_Left - Prefix_Left; - when Iir_Downto => + when Dir_Downto => Off := Prefix_Left - Slice_Left; end case; if Off < 0 then @@ -672,7 +672,7 @@ package body Trans.Chap6 is New_Lit (Ghdl_Dir_To_Node), Ghdl_Bool_Type)); end if; - if not Static_Range or else Get_Direction (Expr_Range) = Iir_To then + if not Static_Range or else Get_Direction (Expr_Range) = Dir_To then -- Diff = slice - bounds. New_Assign_Stmt (New_Obj (Diff), @@ -686,7 +686,7 @@ package body Trans.Chap6 is if not Static_Range then New_Else_Stmt (If_Blk1); end if; - if not Static_Range or else Get_Direction (Expr_Range) = Iir_Downto + if not Static_Range or else Get_Direction (Expr_Range) = Dir_Downto then -- Diff = bounds - slice. New_Assign_Stmt diff --git a/src/vhdl/translate/trans-chap7.adb b/src/vhdl/translate/trans-chap7.adb index 9535b5c05..2e7e76a9b 100644 --- a/src/vhdl/translate/trans-chap7.adb +++ b/src/vhdl/translate/trans-chap7.adb @@ -639,9 +639,9 @@ package body Trans.Chap7 is function Translate_Static_Range_Dir (Expr : Iir) return O_Cnode is begin case Get_Direction (Expr) is - when Iir_To => + when Dir_To => return Ghdl_Dir_To_Node; - when Iir_Downto => + when Dir_Downto => return Ghdl_Dir_Downto_Node; end case; end Translate_Static_Range_Dir; @@ -682,7 +682,7 @@ package body Trans.Chap7 is -- Compute the length of LEFT DIR (to/downto) RIGHT. function Compute_Range_Length - (Left : O_Enode; Right : O_Enode; Dir : Iir_Direction) return O_Enode + (Left : O_Enode; Right : O_Enode; Dir : Direction_Type) return O_Enode is Rng_Type : constant O_Tnode := Ghdl_I32_Type; L : constant O_Enode := New_Convert_Ov (Left, Rng_Type); @@ -693,9 +693,9 @@ package body Trans.Chap7 is If_Blk : O_If_Block; begin case Dir is - when Iir_To => + when Dir_To => Val := New_Dyadic_Op (ON_Sub_Ov, R, L); - when Iir_Downto => + when Dir_Downto => Val := New_Dyadic_Op (ON_Sub_Ov, L, R); end case; @@ -4569,13 +4569,13 @@ package body Trans.Chap7 is return Null_Iir; end if; case Get_Direction (Rng) is - when Iir_To => + when Dir_To => if (Left_Pat = Pat_1 and Right_Pat = Pat_Length) or else (Left_Pat = Pat_0 and Right_Pat = Pat_Length_1) then return Length_Attr; end if; - when Iir_Downto => + when Dir_Downto => if (Left_Pat = Pat_Length and Right_Pat = Pat_1) or else (Left_Pat = Pat_Length_1 and Right_Pat = Pat_0) then diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb index 034483c72..2c67eebd4 100644 --- a/src/vhdl/translate/trans-chap8.adb +++ b/src/vhdl/translate/trans-chap8.adb @@ -407,7 +407,7 @@ package body Trans.Chap8 is end Gen_Update_Iterator_Common; procedure Gen_Update_Iterator (Iterator : O_Dnode; - Dir : Iir_Direction; + Dir : Direction_Type; Val : Unsigned_64; Itype : Iir) is @@ -415,9 +415,9 @@ package body Trans.Chap8 is V : O_Enode; begin case Dir is - when Iir_To => + when Dir_To => Op := ON_Add_Ov; - when Iir_Downto => + when Dir_Downto => Op := ON_Sub_Ov; end case; Gen_Update_Iterator_Common (Val, Itype, V); @@ -426,7 +426,7 @@ package body Trans.Chap8 is end Gen_Update_Iterator; procedure Gen_Update_Iterator (Iterator : Var_Type; - Dir : Iir_Direction; + Dir : Direction_Type; Val : Unsigned_64; Itype : Iir) is @@ -434,9 +434,9 @@ package body Trans.Chap8 is V : O_Enode; begin case Dir is - when Iir_To => + when Dir_To => Op := ON_Add_Ov; - when Iir_Downto => + when Dir_Downto => Op := ON_Sub_Ov; end case; Gen_Update_Iterator_Common (Val, Itype, V); @@ -550,7 +550,7 @@ package body Trans.Chap8 is Iter_Type_Info : constant Ortho_Info_Acc := Get_Info (Iter_Base_Type); It_Info : constant Ortho_Info_Acc := Get_Info (Iterator); Constraint : constant Iir := Get_Range_Constraint (Iter_Type); - Dir : Iir_Direction; + Dir : Direction_Type; Op : ON_Op_Kind; Rng : O_Lnode; begin @@ -565,9 +565,9 @@ package body Trans.Chap8 is Chap7.Translate_Range_Expression_Right (Constraint, Iter_Base_Type)); case Dir is - when Iir_To => + when Dir_To => Op := ON_Le; - when Iir_Downto => + when Dir_Downto => Op := ON_Ge; end case; -- Check for at least one iteration. @@ -632,12 +632,12 @@ package body Trans.Chap8 is -- Update the iterator. Chap6.Get_Deep_Range_Expression (Iter_Type, Deep_Rng, Deep_Reverse); if Deep_Rng /= Null_Iir then - if Get_Direction (Deep_Rng) = Iir_To xor Deep_Reverse then + if Get_Direction (Deep_Rng) = Dir_To xor Deep_Reverse then Gen_Update_Iterator (It_Info.Iterator_Var, - Iir_To, 1, Iter_Base_Type); + Dir_To, 1, Iter_Base_Type); else Gen_Update_Iterator (It_Info.Iterator_Var, - Iir_Downto, 1, Iter_Base_Type); + Dir_Downto, 1, Iter_Base_Type); end if; else Start_If_Stmt @@ -647,10 +647,10 @@ package body Trans.Chap8 is New_Lit (Ghdl_Dir_To_Node), Ghdl_Bool_Type)); Gen_Update_Iterator (It_Info.Iterator_Var, - Iir_To, 1, Iter_Base_Type); + Dir_To, 1, Iter_Base_Type); New_Else_Stmt (If_Blk1); Gen_Update_Iterator (It_Info.Iterator_Var, - Iir_Downto, 1, Iter_Base_Type); + Dir_Downto, 1, Iter_Base_Type); Finish_If_Stmt (If_Blk1); end if; end Update_For_Loop; diff --git a/src/vhdl/translate/trans-chap8.ads b/src/vhdl/translate/trans-chap8.ads index 8a230ce82..9433f865b 100644 --- a/src/vhdl/translate/trans-chap8.ads +++ b/src/vhdl/translate/trans-chap8.ads @@ -78,7 +78,7 @@ package Trans.Chap8 is -- Inc or dec by VAL ITERATOR according to DIR. -- Used for loop statements. procedure Gen_Update_Iterator (Iterator : O_Dnode; - Dir : Iir_Direction; + Dir : Direction_Type; Val : Unsigned_64; Itype : Iir); diff --git a/src/vhdl/translate/trans-chap9.adb b/src/vhdl/translate/trans-chap9.adb index 58533e37b..5ec57edc7 100644 --- a/src/vhdl/translate/trans-chap9.adb +++ b/src/vhdl/translate/trans-chap9.adb @@ -1383,7 +1383,7 @@ package body Trans.Chap9 is | Type_Iir_Pure_State | Type_Iir_Delay_Mechanism | Type_Iir_Predefined_Functions - | Type_Iir_Direction + | Type_Direction_Type | Type_Iir_Int32 | Type_Int32 | Type_Fp64 |