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-rw-r--r--src/vhdl/translate/trans-chap9.adb3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/vhdl/translate/trans-chap9.adb b/src/vhdl/translate/trans-chap9.adb
index 5211451e3..c10c0d24f 100644
--- a/src/vhdl/translate/trans-chap9.adb
+++ b/src/vhdl/translate/trans-chap9.adb
@@ -376,7 +376,8 @@ package body Trans.Chap9 is
use PSL.Nodes;
begin
case Get_Kind (Expr) is
- when N_HDL_Expr =>
+ when N_HDL_Bool
+ | N_HDL_Expr =>
declare
E : constant Iir := Get_HDL_Node (Expr);
Rtype : constant Iir := Get_Base_Type (Get_Type (E));