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Diffstat (limited to 'src/vhdl/translate/trans-chap8.adb')
| -rw-r--r-- | src/vhdl/translate/trans-chap8.adb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb index 00505e33d..55cf82ece 100644 --- a/src/vhdl/translate/trans-chap8.adb +++ b/src/vhdl/translate/trans-chap8.adb @@ -4081,7 +4081,7 @@ package body Trans.Chap8 is end if; Res := Signal_Assign_Data' (Expr => Chap3.Index_Base (Chap3.Get_Composite_Base (Val.Expr), - Targ_Type, New_Obj_Value (Index)), + Targ_Type, New_Obj_Value (Index)), Reject => Val.Reject, After => Val.After); return Res; |