diff options
Diffstat (limited to 'src/synth')
| -rw-r--r-- | src/synth/netlists-builders.adb | 13 | ||||
| -rw-r--r-- | src/synth/netlists-builders.ads | 3 | ||||
| -rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 6 | ||||
| -rw-r--r-- | src/synth/netlists-gates.ads | 2 | ||||
| -rw-r--r-- | src/synth/synth-stmts.adb | 5 |
5 files changed, 11 insertions, 18 deletions
diff --git a/src/synth/netlists-builders.adb b/src/synth/netlists-builders.adb index 86d940379..7c95fd68c 100644 --- a/src/synth/netlists-builders.adb +++ b/src/synth/netlists-builders.adb @@ -234,7 +234,7 @@ package body Netlists.Builders is begin Res := New_User_Module (Ctxt.Design, New_Sname_Artificial (Get_Identifier ("dyn_insert")), - Id_Dyn_Insert, 3, 1, 2); + Id_Dyn_Insert, 3, 1, 1); Ctxt.M_Dyn_Insert := Res; Outputs := (0 => Create_Output ("o")); Inputs := (0 => Create_Input ("i"), @@ -242,9 +242,7 @@ package body Netlists.Builders is 2 => Create_Input ("p")); Set_Port_Desc (Res, Inputs, Outputs); Set_Param_Desc - (Res, (0 => (New_Sname_Artificial (Get_Identifier ("step")), - Typ => Param_Uns32), - 1 => (New_Sname_Artificial (Get_Identifier ("offset")), + (Res, (0 => (New_Sname_Artificial (Get_Identifier ("offset")), Typ => Param_Uns32))); end Create_Dyn_Insert_Module; @@ -957,9 +955,7 @@ package body Netlists.Builders is end Build_Extend; function Build_Dyn_Insert - (Ctxt : Context_Acc; - I : Net; V : Net; P : Net; Step : Uns32; Off : Uns32) - return Net + (Ctxt : Context_Acc; I : Net; V : Net; P : Net; Off : Uns32) return Net is Wd : constant Width := Get_Width (I); pragma Assert (Wd /= No_Width); @@ -974,8 +970,7 @@ package body Netlists.Builders is Connect (Get_Input (Inst, 1), V); end if; Connect (Get_Input (Inst, 2), P); - Set_Param_Uns32 (Inst, 0, Step); - Set_Param_Uns32 (Inst, 1, Off); + Set_Param_Uns32 (Inst, 0, Off); return O; end Build_Dyn_Insert; diff --git a/src/synth/netlists-builders.ads b/src/synth/netlists-builders.ads index 581e70602..45dfed81d 100644 --- a/src/synth/netlists-builders.ads +++ b/src/synth/netlists-builders.ads @@ -132,8 +132,7 @@ package Netlists.Builders is (Ctxt : Context_Acc; I : Net; P : Net; Off : Uns32; W : Width) return Net; function Build_Dyn_Insert - (Ctxt : Context_Acc; I : Net; V : Net; P : Net; Step : Uns32; Off : Uns32) - return Net; + (Ctxt : Context_Acc; I : Net; V : Net; P : Net; Off : Uns32) return Net; function Build_Memidx1 (Ctxt : Context_Acc; diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index b0fd454a1..353f14475 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -623,7 +623,7 @@ package body Netlists.Disp_Vhdl is when Id_Dyn_Insert => declare -- I0: Input, I1: Value, I2: position - -- P0: Step, P1: offset + -- P0: offset I0 : constant Net := Get_Input_Net (Inst, 0); I1 : constant Net := Get_Input_Net (Inst, 1); I2 : constant Net := Get_Input_Net (Inst, 2); @@ -652,12 +652,12 @@ package body Netlists.Disp_Vhdl is Inst); if Iw > 1 then Disp_Template - ("to_integer (\ui2) * \p0 + (\sp1 + \n0)" & NL & + ("to_integer (\ui2) + (\sp0 + \n0)" & NL & " downto ", Inst, (0 => Iw - 1)); end if; Disp_Template - ("to_integer (\ui2) * \p0 + (\sp1))" & + ("to_integer (\ui2) + (\sp0))" & " <= \i1;" & NL & " end process;" & NL, Inst); diff --git a/src/synth/netlists-gates.ads b/src/synth/netlists-gates.ads index 4ba14e137..b156b2986 100644 --- a/src/synth/netlists-gates.ads +++ b/src/synth/netlists-gates.ads @@ -149,7 +149,7 @@ package Netlists.Gates is -- Like Insert but for dynamic values. -- T := IN0 - -- T [IN2*STEP+OFF+WD-1:IN2*STEP+OFF] := IN1 + -- T [IN2+OFF+WD-1:IN2+OFF] := IN1 -- OUT := T Id_Dyn_Insert : constant Module_Id := 70; diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb index da8c74acc..8cbed506d 100644 --- a/src/synth/synth-stmts.adb +++ b/src/synth/synth-stmts.adb @@ -303,7 +303,7 @@ package body Synth.Stmts is Targ_Net := Get_Current_Assign_Value (Build_Context, Obj.W, Off, Get_Type_Width (Typ)); V := Build_Dyn_Insert - (Build_Context, Targ_Net, No_Net, Voff, 1, Idx_Off); + (Build_Context, Targ_Net, No_Net, Voff, Idx_Off); Set_Location (V, Target); return Target_Info'(Kind => Target_Memory, Targ_Type => El_Typ, @@ -341,8 +341,7 @@ package body Synth.Stmts is Targ_Net := Get_Current_Assign_Value (Build_Context, Obj.W, Off, Get_Type_Width (Typ)); V := Build_Dyn_Insert - (Build_Context, Targ_Net, No_Net, - Inp, 1, Sl_Off); + (Build_Context, Targ_Net, No_Net, Inp, Sl_Off); Set_Location (V, Target); return Target_Info'(Kind => Target_Memory, Targ_Type => Res_Type, |