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-rw-r--r--src/simul/simul-vhdl_simul.adb9
1 files changed, 1 insertions, 8 deletions
diff --git a/src/simul/simul-vhdl_simul.adb b/src/simul/simul-vhdl_simul.adb
index d93d13869..e898031bf 100644
--- a/src/simul/simul-vhdl_simul.adb
+++ b/src/simul/simul-vhdl_simul.adb
@@ -2245,14 +2245,7 @@ package body Simul.Vhdl_Simul is
-- TODO
null;
when Iir_Kind_Psl_Endpoint_Declaration =>
- declare
- Val : Valtyp;
- begin
- Val := Create_Value_Memory (Bit_Type, Global_Pool'Access);
- Write_Discrete (Val, 0);
- -- TODO: create the object/signal during elaboration
- Create_Object (Proc.Instance, Proc.Proc, Val);
- end;
+ null;
when others =>
null;
end case;