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-rw-r--r--src/ghdldrv/ghdlsimul.adb6
-rw-r--r--src/ghdldrv/ghdlsynth.adb8
2 files changed, 7 insertions, 7 deletions
diff --git a/src/ghdldrv/ghdlsimul.adb b/src/ghdldrv/ghdlsimul.adb
index 52408b067..97adef30d 100644
--- a/src/ghdldrv/ghdlsimul.adb
+++ b/src/ghdldrv/ghdlsimul.adb
@@ -27,7 +27,7 @@ with Flags;
with Vhdl.Std_Package;
with Vhdl.Canon;
with Vhdl.Configuration;
-with Simul.Annotations;
+with Vhdl.Annotations;
with Simul.Elaboration;
with Simul.Simulation.Main;
with Simul.Debugger;
@@ -67,9 +67,9 @@ package body Ghdlsimul is
Common_Compile_Elab (Cmd_Name, Args, Opt_Arg, Top_Conf);
-- Annotate all units.
- Simul.Annotations.Annotate (Vhdl.Std_Package.Std_Standard_Unit);
+ Vhdl.Annotations.Annotate (Vhdl.Std_Package.Std_Standard_Unit);
for I in Design_Units.First .. Design_Units.Last loop
- Simul.Annotations.Annotate (Design_Units.Table (I));
+ Vhdl.Annotations.Annotate (Design_Units.Table (I));
end loop;
end Compile_Elab;
diff --git a/src/ghdldrv/ghdlsynth.adb b/src/ghdldrv/ghdlsynth.adb
index d02386eea..70315dc31 100644
--- a/src/ghdldrv/ghdlsynth.adb
+++ b/src/ghdldrv/ghdlsynth.adb
@@ -27,7 +27,7 @@ with Vhdl.Nodes; use Vhdl.Nodes;
with Vhdl.Std_Package;
with Vhdl.Canon;
with Vhdl.Configuration;
-with Simul.Annotations;
+with Vhdl.Annotations;
with Synthesis;
with Netlists.Dump;
@@ -92,7 +92,7 @@ package body Ghdlsynth is
end if;
end loop;
- Simul.Annotations.Flag_Synthesis := True;
+ Vhdl.Annotations.Flag_Synthesis := True;
Common_Compile_Init (False);
Flags.Flag_Elaborate_With_Outdated := False;
@@ -117,9 +117,9 @@ package body Ghdlsynth is
end if;
-- Annotate all units.
- Simul.Annotations.Annotate (Vhdl.Std_Package.Std_Standard_Unit);
+ Vhdl.Annotations.Annotate (Vhdl.Std_Package.Std_Standard_Unit);
for I in Design_Units.First .. Design_Units.Last loop
- Simul.Annotations.Annotate (Design_Units.Table (I));
+ Vhdl.Annotations.Annotate (Design_Units.Table (I));
end loop;
return Synthesis.Synth_Design (Config);