diff options
| -rw-r--r-- | src/synth/synth-vhdl_context.adb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/synth-vhdl_context.adb b/src/synth/synth-vhdl_context.adb index a01ad9db0..472d5ea4f 100644 --- a/src/synth/synth-vhdl_context.adb +++ b/src/synth/synth-vhdl_context.adb @@ -221,7 +221,7 @@ package body Synth.Vhdl_Context is end loop; pragma Assert (Vec'Last = Digit_Index ((W - 1) / 32)); - Mask := Shift_Right (not 0, 32 - Natural (W mod 32)); + Mask := Shift_Right (not 0, (32 - Natural (W mod 32)) mod 32); if (Vec (Vec'Last).Val and Mask) /= (Val and Mask) or else (Vec (Vec'Last).Zx and Mask) /= (Zx and Mask) then |