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-rw-r--r--testsuite/gna/issue2323/st1.vhdl7
-rw-r--r--testsuite/gna/issue2323/st2.vhdl8
-rw-r--r--testsuite/gna/issue2323/test_ip.vhdl20
-rwxr-xr-xtestsuite/gna/issue2323/testsuite.sh16
4 files changed, 51 insertions, 0 deletions
diff --git a/testsuite/gna/issue2323/st1.vhdl b/testsuite/gna/issue2323/st1.vhdl
new file mode 100644
index 000000000..623b0acbc
--- /dev/null
+++ b/testsuite/gna/issue2323/st1.vhdl
@@ -0,0 +1,7 @@
+entity st1 is
+end;
+
+architecture arch of st1 is
+ subtype mypos is natural range -1 to 5;
+begin
+end arch;
diff --git a/testsuite/gna/issue2323/st2.vhdl b/testsuite/gna/issue2323/st2.vhdl
new file mode 100644
index 000000000..b1d91ea04
--- /dev/null
+++ b/testsuite/gna/issue2323/st2.vhdl
@@ -0,0 +1,8 @@
+entity st2 is
+end;
+
+architecture arch of st2 is
+ subtype mypos is natural range -1 to 5;
+ subtype my2 is mypos range 2 to 3;
+begin
+end arch;
diff --git a/testsuite/gna/issue2323/test_ip.vhdl b/testsuite/gna/issue2323/test_ip.vhdl
new file mode 100644
index 000000000..5647dc9c3
--- /dev/null
+++ b/testsuite/gna/issue2323/test_ip.vhdl
@@ -0,0 +1,20 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity TEST_IP is
+port (
+ I_CLK : in std_logic;
+ I_RST : in std_logic;
+
+ I_DATA : in std_logic;
+ O_DATA : out std_logic
+);
+end entity TEST_IP;
+
+architecture TEST_IP_ARCH of TEST_IP is
+
+ signal test_signal : std_logic_vector(7 downto -1);
+
+begin
+
+end architecture TEST_IP_ARCH;
diff --git a/testsuite/gna/issue2323/testsuite.sh b/testsuite/gna/issue2323/testsuite.sh
new file mode 100755
index 000000000..5bd7edc12
--- /dev/null
+++ b/testsuite/gna/issue2323/testsuite.sh
@@ -0,0 +1,16 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+analyze test_ip.vhdl
+elab_simulate_failure test_ip
+
+analyze st1.vhdl
+elab_simulate_failure st1
+
+analyze st2.vhdl
+elab_simulate_failure st2
+
+clean
+
+echo "Test successful"