diff options
-rw-r--r-- | testsuite/gna/issue333/repro.vhdl | 30 | ||||
-rwxr-xr-x | testsuite/gna/issue333/testsuite.sh | 15 | ||||
-rw-r--r-- | testsuite/gna/issue333/time_test.vhdl | 24 |
3 files changed, 69 insertions, 0 deletions
diff --git a/testsuite/gna/issue333/repro.vhdl b/testsuite/gna/issue333/repro.vhdl new file mode 100644 index 000000000..8bab387ce --- /dev/null +++ b/testsuite/gna/issue333/repro.vhdl @@ -0,0 +1,30 @@ +entity repro is +end repro; + +architecture Behavioral of repro is + +constant c_CLOCK_FREQUENCY : natural := 32000000; +constant c_SWITCH_ON_TIME_ms : time := 200 ms; +constant c_switch_ms : natural := c_SWITCH_ON_TIME_ms / 1 ms; +constant c_freq1 : real := real(c_CLOCK_FREQUENCY * + (c_SWITCH_ON_TIME_ms / 1 ms)); +constant c_SWITCH_COUNT_CYCLES : integer := integer(real(c_CLOCK_FREQUENCY * + (c_SWITCH_ON_TIME_ms / 1 ms)) / 1000.0); + +begin +process is +begin + report " Switch ON time " & time'image(c_SWITCH_ON_TIME_ms) severity NOTE; + report " Switch count " & natural'image(c_SWITCH_COUNT_CYCLES) severity NOTE; + -- sanity checks on time constraints + report "Clock frequency = " & natural'image(c_CLOCK_FREQUENCY) & " Hz" severity NOTE; + report "switch_time (ms): " & natural'image (c_switch_ms); + report "freq * switch_time (ms): " & real'image (c_freq1); + + report "Clock period = " & time'image( 1 sec / c_CLOCK_FREQUENCY) severity NOTE; + report "Switch period = " & time'image ( 1 sec / c_CLOCK_FREQUENCY * c_SWITCH_COUNT_CYCLES) severity NOTE; + Assert c_SWITCH_ON_TIME_ms = 1 sec / c_CLOCK_FREQUENCY * c_SWITCH_COUNT_CYCLES + report "Wrong Switch ON time = " & time'image ( 1 sec / c_CLOCK_FREQUENCY * c_SWITCH_COUNT_CYCLES) severity ERROR; + wait; +end process; +end Behavioral; diff --git a/testsuite/gna/issue333/testsuite.sh b/testsuite/gna/issue333/testsuite.sh new file mode 100755 index 000000000..e182d70eb --- /dev/null +++ b/testsuite/gna/issue333/testsuite.sh @@ -0,0 +1,15 @@ +#! /bin/sh + +. ../../testenv.sh + +if $GHDL --version | grep -q "mcode code generator"; then + analyze repro.vhdl + elab_simulate_failure repro + + analyze time_test.vhdl + elab_simulate_failure time_test +fi + +clean + +echo "Test successful" diff --git a/testsuite/gna/issue333/time_test.vhdl b/testsuite/gna/issue333/time_test.vhdl new file mode 100644 index 000000000..2895f3ef0 --- /dev/null +++ b/testsuite/gna/issue333/time_test.vhdl @@ -0,0 +1,24 @@ +entity Time_test is +end Time_test; + +architecture Behavioral of Time_test is + +constant c_CLOCK_FREQUENCY : natural := 32000000; +constant c_SWITCH_ON_TIME_ms : time := 200 ms; +constant c_SWITCH_COUNT_CYCLES : integer := integer(real(c_CLOCK_FREQUENCY * + (c_SWITCH_ON_TIME_ms / 1 ms)) / 1000.0); + +begin +process is +begin + report " Switch ON time " & time'image(c_SWITCH_ON_TIME_ms) severity NOTE; + report " Switch count " & natural'image(c_SWITCH_COUNT_CYCLES) severity NOTE; + -- sanity checks on time constraints + report "Clock frequency = " & natural'image(c_CLOCK_FREQUENCY) & " Hz" severity NOTE; + report "Clock period = " & time'image( 1 sec / c_CLOCK_FREQUENCY) severity NOTE; + report "Switch period = " & time'image ( 1 sec / c_CLOCK_FREQUENCY * c_SWITCH_COUNT_CYCLES) severity NOTE; + Assert c_SWITCH_ON_TIME_ms = 1 sec / c_CLOCK_FREQUENCY * c_SWITCH_COUNT_CYCLES + report "Wrong Switch ON time = " & time'image ( 1 sec / c_CLOCK_FREQUENCY * c_SWITCH_COUNT_CYCLES) severity ERROR; + wait; +end process; +end Behavioral; |