diff options
| -rw-r--r-- | libraries/Makefile.inc | 16 | ||||
| -rw-r--r-- | libraries/synopsys/std_logic_misc-body.vhdl | 10 | ||||
| -rw-r--r-- | libraries/synopsys/std_logic_misc.vhdl | 12 |
3 files changed, 28 insertions, 10 deletions
diff --git a/libraries/Makefile.inc b/libraries/Makefile.inc index c19cc2295..8b91a7318 100644 --- a/libraries/Makefile.inc +++ b/libraries/Makefile.inc @@ -49,7 +49,9 @@ VITAL2000_BSRCS := vital2000/timing_p.vhdl vital2000/timing_b.vhdl \ SYNOPSYS_BSRCS := synopsys/std_logic_arith.vhdl \ synopsys/std_logic_unsigned.vhdl \ synopsys/std_logic_signed.vhdl -SYNOPSYS8793_BSRCS := synopsys/std_logic_textio.vhdl synopsys/std_logic_misc.vhdl synopsys/std_logic_misc-body.vhdl +SYNOPSYS_V_BSRCS := synopsys/std_logic_misc.vhdl \ + synopsys/std_logic_misc-body.vhdl +SYNOPSYS8793_BSRCS := synopsys/std_logic_textio.vhdl MENTOR_BSRCS := mentor/std_logic_arith.vhdl mentor/std_logic_arith_body.vhdl IEEE08_BSRCS := \ ieee2008/std_logic_1164.vhdl ieee2008/std_logic_1164-body.vhdl \ @@ -72,9 +74,9 @@ STD93_BSRCS := $(STD_SRCS:.vhdl=.v93) STD08_BSRCS := $(STD_SRCS:.vhdl=.v08) std/env.vhdl std/env_body.vhdl IEEE87_BSRCS := $(IEEE_SRCS:.vhdl=.v87) IEEE93_BSRCS := $(IEEE_SRCS:.vhdl=.v93) $(MATH_SRCS) -SYNOPSYS87_BSRCS := $(SYNOPSYS_BSRCS) $(SYNOPSYS8793_BSRCS) -SYNOPSYS93_BSRCS := $(SYNOPSYS_BSRCS) $(SYNOPSYS8793_BSRCS) -SYNOPSYS08_BSRCS := $(SYNOPSYS_BSRCS) +SYNOPSYS87_BSRCS := $(SYNOPSYS_BSRCS) $(SYNOPSYS_V_BSRCS) $(SYNOPSYS8793_BSRCS) +SYNOPSYS93_BSRCS := $(SYNOPSYS_BSRCS) $(SYNOPSYS_V_BSRCS) $(SYNOPSYS8793_BSRCS) +SYNOPSYS08_BSRCS := $(SYNOPSYS_BSRCS) $(SYNOPSYS_V_BSRCS:.vhdl=.v08) MENTOR93_BSRCS := $(MENTOR_BSRCS) .PREFIXES: .vhdl .v93 .v87 .v08 @@ -85,7 +87,8 @@ SED_V93:= sed -e '/--V87/s/^/ --/' \ SED_V87:= sed -e '/--!V87/s/^/ --/' -e '/--START-!V87/,/--END-!V87/s/^/--/' \ -e '/--START-V08/,/--END-V08/s/^/--/' -SED_V08:= sed -e '/--V87/s/^/ --/' +SED_V08:= sed -e '/--V87/s/^/ --/' -e '/--!V08/s/^/ --/' \ + -e '/--START-!V08/,/--END-!V08/s/^/--/' LIB87_DIR:=$(LIBDST_DIR)/v87 STD87_DIR:=$(LIB87_DIR)/std @@ -289,6 +292,9 @@ $(IEEE08_DIR)/ieee-obj08.cf: $(ANALYZE_DEP) $(IEEE08_SRCS) $(STD08_DIR)/std-obj0 echo $$cmd; eval $$cmd || exit 1; \ done +$(LIBDST_DIR)/src/synopsys/%.v08: $(LIBSRC_DIR)/synopsys/%.vhdl + $(SED_V08) < $< > $@ + synopsys.v08: $(SYN08_DIR)/ieee-obj08.cf $(SYN08_DIR)/ieee-obj08.cf: $(ANALYZE_DEP) $(SYNOPSYS08_SRCS) $(IEEE08_DIR)/ieee-obj08.cf diff --git a/libraries/synopsys/std_logic_misc-body.vhdl b/libraries/synopsys/std_logic_misc-body.vhdl index 531328c3f..84a32bb09 100644 --- a/libraries/synopsys/std_logic_misc-body.vhdl +++ b/libraries/synopsys/std_logic_misc-body.vhdl @@ -94,6 +94,7 @@ package body std_logic_misc is --------------------------------------------------------------------- --synopsys synthesis_on +--START-!V08 function Drive (V: STD_LOGIC_VECTOR) return STD_ULOGIC_VECTOR is -- pragma built_in SYN_FEED_THRU -- pragma subpgm_id 389 @@ -105,6 +106,7 @@ package body std_logic_misc is return STD_ULOGIC_VECTOR(Value); --synopsys synthesis_on end Drive; +--END-!V08 function Drive (V: STD_ULOGIC_VECTOR) return STD_LOGIC_VECTOR is @@ -146,6 +148,7 @@ package body std_logic_misc is end Sense; +--START-!V08 function Sense (V: STD_ULOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_LOGIC_VECTOR is -- pragma subpgm_id 392 @@ -165,7 +168,7 @@ package body std_logic_misc is end loop; return Result; end Sense; - +--END-!V08 function Sense (V: STD_ULOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_ULOGIC_VECTOR is @@ -187,7 +190,7 @@ package body std_logic_misc is return Result; end Sense; - +--START-!V08 function Sense (V: STD_LOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_LOGIC_VECTOR is -- pragma subpgm_id 394 @@ -228,6 +231,7 @@ package body std_logic_misc is end loop; return Result; end Sense; +--END-!V08 --------------------------------------------------------------------- -- @@ -504,6 +508,7 @@ package body std_logic_misc is -------------------------------------------------------------------------- +--START-!V08 function AND_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01 is -- pragma subpgm_id 399 variable result: STD_LOGIC; @@ -554,6 +559,7 @@ package body std_logic_misc is begin return not XOR_REDUCE(ARG); end; +--END-!V08 function AND_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01 is -- pragma subpgm_id 405 diff --git a/libraries/synopsys/std_logic_misc.vhdl b/libraries/synopsys/std_logic_misc.vhdl index 999aa8391..409b2a082 100644 --- a/libraries/synopsys/std_logic_misc.vhdl +++ b/libraries/synopsys/std_logic_misc.vhdl @@ -53,7 +53,7 @@ package std_logic_misc is --synopsys synthesis_on function Drive (V: STD_ULOGIC_VECTOR) return STD_LOGIC_VECTOR; - function Drive (V: STD_LOGIC_VECTOR) return STD_ULOGIC_VECTOR; + function Drive (V: STD_LOGIC_VECTOR) return STD_ULOGIC_VECTOR; --!V08 --synopsys synthesis_off --attribute CLOSELY_RELATED_TCF of Drive: function is TRUE; @@ -68,15 +68,19 @@ package std_logic_misc is function Sense (V: STD_ULOGIC; vZ, vU, vDC: STD_ULOGIC) return STD_LOGIC; +--START-!V08 function Sense (V: STD_ULOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_LOGIC_VECTOR; +--END-!V08 function Sense (V: STD_ULOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_ULOGIC_VECTOR; +--START-!V08 function Sense (V: STD_LOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_LOGIC_VECTOR; function Sense (V: STD_LOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_ULOGIC_VECTOR; +--END-!V08 --synopsys synthesis_on @@ -142,20 +146,22 @@ package std_logic_misc is ) return BIT; -------------------------------------------------------------------- +--START-!V08 function AND_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; function NAND_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; function OR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; function NOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; function XOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; function XNOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; - +--END-!V08 + function AND_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; function NAND_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; function OR_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; function NOR_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; function XOR_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; function XNOR_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; - + --synopsys synthesis_off function fun_BUF3S(Input, Enable: UX01; Strn: STRENGTH) return STD_LOGIC; |