diff options
| -rw-r--r-- | python/libghdl/thin/vhdl/nodes.py | 728 | ||||
| -rw-r--r-- | src/synth/ghdlsynth_gates.h | 15 | ||||
| -rw-r--r-- | src/synth/netlists-builders.adb | 2 | ||||
| -rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 16 | ||||
| -rw-r--r-- | src/synth/netlists-gates.ads | 17 | ||||
| -rw-r--r-- | src/synth/synth-oper.adb | 25 | ||||
| -rw-r--r-- | src/synth/synth-static_oper.adb | 2 | ||||
| -rw-r--r-- | src/vhdl/vhdl-ieee-std_logic_1164.adb | 14 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 8 |
9 files changed, 438 insertions, 389 deletions
diff --git a/python/libghdl/thin/vhdl/nodes.py b/python/libghdl/thin/vhdl/nodes.py index d40f1560e..1c15d0bae 100644 --- a/python/libghdl/thin/vhdl/nodes.py +++ b/python/libghdl/thin/vhdl/nodes.py @@ -1177,368 +1177,372 @@ class Iir_Predefined: Ieee_1164_Scalar_Is_X = 199 Ieee_1164_Rising_Edge = 200 Ieee_1164_Falling_Edge = 201 - Ieee_1164_Vector_And_Reduce = 202 - Ieee_1164_Vector_Or_Reduce = 203 - Ieee_1164_Vector_Sll = 204 - Ieee_1164_Vector_Srl = 205 - Ieee_1164_Vector_Rol = 206 - Ieee_1164_Vector_Ror = 207 - Ieee_1164_Condition_Operator = 208 - Ieee_Numeric_Std_Toint_Uns_Nat = 209 - Ieee_Numeric_Std_Toint_Sgn_Int = 210 - Ieee_Numeric_Std_Touns_Nat_Nat_Uns = 211 - Ieee_Numeric_Std_Touns_Nat_Uns_Uns = 212 - Ieee_Numeric_Std_Tosgn_Int_Nat_Sgn = 213 - Ieee_Numeric_Std_Tosgn_Int_Sgn_Sgn = 214 - Ieee_Numeric_Std_Resize_Uns_Nat = 215 - Ieee_Numeric_Std_Resize_Sgn_Nat = 216 - Ieee_Numeric_Std_Resize_Uns_Uns = 217 - Ieee_Numeric_Std_Resize_Sgn_Sgn = 218 - Ieee_Numeric_Std_Add_Uns_Uns = 219 - Ieee_Numeric_Std_Add_Uns_Nat = 220 - Ieee_Numeric_Std_Add_Nat_Uns = 221 - Ieee_Numeric_Std_Add_Uns_Log = 222 - Ieee_Numeric_Std_Add_Log_Uns = 223 - Ieee_Numeric_Std_Add_Sgn_Sgn = 224 - Ieee_Numeric_Std_Add_Sgn_Int = 225 - Ieee_Numeric_Std_Add_Int_Sgn = 226 - Ieee_Numeric_Std_Add_Sgn_Log = 227 - Ieee_Numeric_Std_Add_Log_Sgn = 228 - Ieee_Numeric_Std_Sub_Uns_Uns = 229 - Ieee_Numeric_Std_Sub_Uns_Nat = 230 - Ieee_Numeric_Std_Sub_Nat_Uns = 231 - Ieee_Numeric_Std_Sub_Uns_Log = 232 - Ieee_Numeric_Std_Sub_Log_Uns = 233 - Ieee_Numeric_Std_Sub_Sgn_Sgn = 234 - Ieee_Numeric_Std_Sub_Sgn_Int = 235 - Ieee_Numeric_Std_Sub_Int_Sgn = 236 - Ieee_Numeric_Std_Sub_Sgn_Log = 237 - Ieee_Numeric_Std_Sub_Log_Sgn = 238 - Ieee_Numeric_Std_Mul_Uns_Uns = 239 - Ieee_Numeric_Std_Mul_Uns_Nat = 240 - Ieee_Numeric_Std_Mul_Nat_Uns = 241 - Ieee_Numeric_Std_Mul_Sgn_Sgn = 242 - Ieee_Numeric_Std_Mul_Sgn_Int = 243 - Ieee_Numeric_Std_Mul_Int_Sgn = 244 - Ieee_Numeric_Std_Div_Uns_Uns = 245 - Ieee_Numeric_Std_Div_Uns_Nat = 246 - Ieee_Numeric_Std_Div_Nat_Uns = 247 - Ieee_Numeric_Std_Div_Sgn_Sgn = 248 - Ieee_Numeric_Std_Div_Sgn_Int = 249 - Ieee_Numeric_Std_Div_Int_Sgn = 250 - Ieee_Numeric_Std_Rem_Uns_Uns = 251 - Ieee_Numeric_Std_Rem_Uns_Nat = 252 - Ieee_Numeric_Std_Rem_Nat_Uns = 253 - Ieee_Numeric_Std_Rem_Sgn_Sgn = 254 - Ieee_Numeric_Std_Rem_Sgn_Int = 255 - Ieee_Numeric_Std_Rem_Int_Sgn = 256 - Ieee_Numeric_Std_Mod_Uns_Uns = 257 - Ieee_Numeric_Std_Mod_Uns_Nat = 258 - Ieee_Numeric_Std_Mod_Nat_Uns = 259 - Ieee_Numeric_Std_Mod_Sgn_Sgn = 260 - Ieee_Numeric_Std_Mod_Sgn_Int = 261 - Ieee_Numeric_Std_Mod_Int_Sgn = 262 - Ieee_Numeric_Std_Gt_Uns_Uns = 263 - Ieee_Numeric_Std_Gt_Uns_Nat = 264 - Ieee_Numeric_Std_Gt_Nat_Uns = 265 - Ieee_Numeric_Std_Gt_Sgn_Sgn = 266 - Ieee_Numeric_Std_Gt_Sgn_Int = 267 - Ieee_Numeric_Std_Gt_Int_Sgn = 268 - Ieee_Numeric_Std_Lt_Uns_Uns = 269 - Ieee_Numeric_Std_Lt_Uns_Nat = 270 - Ieee_Numeric_Std_Lt_Nat_Uns = 271 - Ieee_Numeric_Std_Lt_Sgn_Sgn = 272 - Ieee_Numeric_Std_Lt_Sgn_Int = 273 - Ieee_Numeric_Std_Lt_Int_Sgn = 274 - Ieee_Numeric_Std_Le_Uns_Uns = 275 - Ieee_Numeric_Std_Le_Uns_Nat = 276 - Ieee_Numeric_Std_Le_Nat_Uns = 277 - Ieee_Numeric_Std_Le_Sgn_Sgn = 278 - Ieee_Numeric_Std_Le_Sgn_Int = 279 - Ieee_Numeric_Std_Le_Int_Sgn = 280 - Ieee_Numeric_Std_Ge_Uns_Uns = 281 - Ieee_Numeric_Std_Ge_Uns_Nat = 282 - Ieee_Numeric_Std_Ge_Nat_Uns = 283 - Ieee_Numeric_Std_Ge_Sgn_Sgn = 284 - Ieee_Numeric_Std_Ge_Sgn_Int = 285 - Ieee_Numeric_Std_Ge_Int_Sgn = 286 - Ieee_Numeric_Std_Eq_Uns_Uns = 287 - Ieee_Numeric_Std_Eq_Uns_Nat = 288 - Ieee_Numeric_Std_Eq_Nat_Uns = 289 - Ieee_Numeric_Std_Eq_Sgn_Sgn = 290 - Ieee_Numeric_Std_Eq_Sgn_Int = 291 - Ieee_Numeric_Std_Eq_Int_Sgn = 292 - Ieee_Numeric_Std_Ne_Uns_Uns = 293 - Ieee_Numeric_Std_Ne_Uns_Nat = 294 - Ieee_Numeric_Std_Ne_Nat_Uns = 295 - Ieee_Numeric_Std_Ne_Sgn_Sgn = 296 - Ieee_Numeric_Std_Ne_Sgn_Int = 297 - Ieee_Numeric_Std_Ne_Int_Sgn = 298 - Ieee_Numeric_Std_Match_Gt_Uns_Uns = 299 - Ieee_Numeric_Std_Match_Gt_Uns_Nat = 300 - Ieee_Numeric_Std_Match_Gt_Nat_Uns = 301 - Ieee_Numeric_Std_Match_Gt_Sgn_Sgn = 302 - Ieee_Numeric_Std_Match_Gt_Sgn_Int = 303 - Ieee_Numeric_Std_Match_Gt_Int_Sgn = 304 - Ieee_Numeric_Std_Match_Lt_Uns_Uns = 305 - Ieee_Numeric_Std_Match_Lt_Uns_Nat = 306 - Ieee_Numeric_Std_Match_Lt_Nat_Uns = 307 - Ieee_Numeric_Std_Match_Lt_Sgn_Sgn = 308 - Ieee_Numeric_Std_Match_Lt_Sgn_Int = 309 - Ieee_Numeric_Std_Match_Lt_Int_Sgn = 310 - Ieee_Numeric_Std_Match_Le_Uns_Uns = 311 - Ieee_Numeric_Std_Match_Le_Uns_Nat = 312 - Ieee_Numeric_Std_Match_Le_Nat_Uns = 313 - Ieee_Numeric_Std_Match_Le_Sgn_Sgn = 314 - Ieee_Numeric_Std_Match_Le_Sgn_Int = 315 - Ieee_Numeric_Std_Match_Le_Int_Sgn = 316 - Ieee_Numeric_Std_Match_Ge_Uns_Uns = 317 - Ieee_Numeric_Std_Match_Ge_Uns_Nat = 318 - Ieee_Numeric_Std_Match_Ge_Nat_Uns = 319 - Ieee_Numeric_Std_Match_Ge_Sgn_Sgn = 320 - Ieee_Numeric_Std_Match_Ge_Sgn_Int = 321 - Ieee_Numeric_Std_Match_Ge_Int_Sgn = 322 - Ieee_Numeric_Std_Match_Eq_Uns_Uns = 323 - Ieee_Numeric_Std_Match_Eq_Uns_Nat = 324 - Ieee_Numeric_Std_Match_Eq_Nat_Uns = 325 - Ieee_Numeric_Std_Match_Eq_Sgn_Sgn = 326 - Ieee_Numeric_Std_Match_Eq_Sgn_Int = 327 - Ieee_Numeric_Std_Match_Eq_Int_Sgn = 328 - Ieee_Numeric_Std_Match_Ne_Uns_Uns = 329 - Ieee_Numeric_Std_Match_Ne_Uns_Nat = 330 - Ieee_Numeric_Std_Match_Ne_Nat_Uns = 331 - Ieee_Numeric_Std_Match_Ne_Sgn_Sgn = 332 - Ieee_Numeric_Std_Match_Ne_Sgn_Int = 333 - Ieee_Numeric_Std_Match_Ne_Int_Sgn = 334 - Ieee_Numeric_Std_Sll_Uns_Int = 335 - Ieee_Numeric_Std_Sll_Sgn_Int = 336 - Ieee_Numeric_Std_Srl_Uns_Int = 337 - Ieee_Numeric_Std_Srl_Sgn_Int = 338 - Ieee_Numeric_Std_Sla_Uns_Int = 339 - Ieee_Numeric_Std_Sla_Sgn_Int = 340 - Ieee_Numeric_Std_Sra_Uns_Int = 341 - Ieee_Numeric_Std_Sra_Sgn_Int = 342 - Ieee_Numeric_Std_And_Uns_Uns = 343 - Ieee_Numeric_Std_And_Sgn_Sgn = 344 - Ieee_Numeric_Std_Or_Uns_Uns = 345 - Ieee_Numeric_Std_Or_Sgn_Sgn = 346 - Ieee_Numeric_Std_Nand_Uns_Uns = 347 - Ieee_Numeric_Std_Nand_Sgn_Sgn = 348 - Ieee_Numeric_Std_Nor_Uns_Uns = 349 - Ieee_Numeric_Std_Nor_Sgn_Sgn = 350 - Ieee_Numeric_Std_Xor_Uns_Uns = 351 - Ieee_Numeric_Std_Xor_Sgn_Sgn = 352 - Ieee_Numeric_Std_Xnor_Uns_Uns = 353 - Ieee_Numeric_Std_Xnor_Sgn_Sgn = 354 - Ieee_Numeric_Std_Not_Uns = 355 - Ieee_Numeric_Std_Not_Sgn = 356 - Ieee_Numeric_Std_Abs_Sgn = 357 - Ieee_Numeric_Std_Neg_Uns = 358 - Ieee_Numeric_Std_Neg_Sgn = 359 - Ieee_Numeric_Std_Min_Uns_Uns = 360 - Ieee_Numeric_Std_Min_Uns_Nat = 361 - Ieee_Numeric_Std_Min_Nat_Uns = 362 - Ieee_Numeric_Std_Min_Sgn_Sgn = 363 - Ieee_Numeric_Std_Min_Sgn_Int = 364 - Ieee_Numeric_Std_Min_Int_Sgn = 365 - Ieee_Numeric_Std_Max_Uns_Uns = 366 - Ieee_Numeric_Std_Max_Uns_Nat = 367 - Ieee_Numeric_Std_Max_Nat_Uns = 368 - Ieee_Numeric_Std_Max_Sgn_Sgn = 369 - Ieee_Numeric_Std_Max_Sgn_Int = 370 - Ieee_Numeric_Std_Max_Int_Sgn = 371 - Ieee_Numeric_Std_Shf_Left_Uns_Nat = 372 - Ieee_Numeric_Std_Shf_Right_Uns_Nat = 373 - Ieee_Numeric_Std_Shf_Left_Sgn_Nat = 374 - Ieee_Numeric_Std_Shf_Right_Sgn_Nat = 375 - Ieee_Numeric_Std_Rot_Left_Uns_Nat = 376 - Ieee_Numeric_Std_Rot_Right_Uns_Nat = 377 - Ieee_Numeric_Std_Rot_Left_Sgn_Nat = 378 - Ieee_Numeric_Std_Rot_Right_Sgn_Nat = 379 - Ieee_Numeric_Std_Match_Log = 380 - Ieee_Numeric_Std_Match_Uns = 381 - Ieee_Numeric_Std_Match_Sgn = 382 - Ieee_Numeric_Std_Match_Slv = 383 - Ieee_Numeric_Std_Match_Suv = 384 - Ieee_Numeric_Std_To_01_Uns = 385 - Ieee_Numeric_Std_To_01_Sgn = 386 - Ieee_Math_Real_Ceil = 387 - Ieee_Math_Real_Floor = 388 - Ieee_Math_Real_Round = 389 - Ieee_Math_Real_Log2 = 390 - Ieee_Math_Real_Sin = 391 - Ieee_Math_Real_Cos = 392 - Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 393 - Ieee_Std_Logic_Unsigned_Add_Slv_Int = 394 - Ieee_Std_Logic_Unsigned_Add_Int_Slv = 395 - Ieee_Std_Logic_Unsigned_Add_Slv_Log = 396 - Ieee_Std_Logic_Unsigned_Add_Log_Slv = 397 - Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 398 - Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 399 - Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 400 - Ieee_Std_Logic_Unsigned_Sub_Slv_Log = 401 - Ieee_Std_Logic_Unsigned_Sub_Log_Slv = 402 - Ieee_Std_Logic_Unsigned_Mul_Slv_Slv = 403 - Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 404 - Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 405 - Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 406 - Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 407 - Ieee_Std_Logic_Unsigned_Le_Slv_Int = 408 - Ieee_Std_Logic_Unsigned_Le_Int_Slv = 409 - Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 410 - Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 411 - Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 412 - Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 413 - Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 414 - Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 415 - Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 416 - Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 417 - Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 418 - Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 419 - Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 420 - Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 421 - Ieee_Std_Logic_Unsigned_Conv_Integer = 422 - Ieee_Std_Logic_Signed_Add_Slv_Slv = 423 - Ieee_Std_Logic_Signed_Add_Slv_Int = 424 - Ieee_Std_Logic_Signed_Add_Int_Slv = 425 - Ieee_Std_Logic_Signed_Add_Slv_Log = 426 - Ieee_Std_Logic_Signed_Add_Log_Slv = 427 - Ieee_Std_Logic_Signed_Sub_Slv_Slv = 428 - Ieee_Std_Logic_Signed_Sub_Slv_Int = 429 - Ieee_Std_Logic_Signed_Sub_Int_Slv = 430 - Ieee_Std_Logic_Signed_Sub_Slv_Log = 431 - Ieee_Std_Logic_Signed_Sub_Log_Slv = 432 - Ieee_Std_Logic_Signed_Mul_Slv_Slv = 433 - Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 434 - Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 435 - Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 436 - Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 437 - Ieee_Std_Logic_Arith_Conv_Integer_Int = 438 - Ieee_Std_Logic_Arith_Conv_Integer_Uns = 439 - Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 440 - Ieee_Std_Logic_Arith_Conv_Integer_Log = 441 - Ieee_Std_Logic_Arith_Conv_Vector_Int = 442 - Ieee_Std_Logic_Arith_Conv_Vector_Uns = 443 - Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 444 - Ieee_Std_Logic_Arith_Conv_Vector_Log = 445 - Ieee_Std_Logic_Arith_Ext = 446 - Ieee_Std_Logic_Arith_Sxt = 447 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 448 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 449 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 450 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 451 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 452 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 453 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 454 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 455 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 456 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 457 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 458 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 459 - Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 460 - Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 461 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 462 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 463 - Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 464 - Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 465 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 466 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 467 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 468 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 469 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 470 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 471 - Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 472 - Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 473 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 474 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 475 - Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 476 - Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 477 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 478 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 479 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 480 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 481 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 482 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 483 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 484 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 485 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 486 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 487 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 488 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 489 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 490 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 491 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 492 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 493 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 494 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 495 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 496 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 497 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 498 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 499 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 500 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 501 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 502 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 503 - Ieee_Std_Logic_Arith_Lt_Uns_Uns = 504 - Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 505 - Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 506 - Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 507 - Ieee_Std_Logic_Arith_Lt_Uns_Int = 508 - Ieee_Std_Logic_Arith_Lt_Int_Uns = 509 - Ieee_Std_Logic_Arith_Lt_Sgn_Int = 510 - Ieee_Std_Logic_Arith_Lt_Int_Sgn = 511 - Ieee_Std_Logic_Arith_Le_Uns_Uns = 512 - Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 513 - Ieee_Std_Logic_Arith_Le_Uns_Sgn = 514 - Ieee_Std_Logic_Arith_Le_Sgn_Uns = 515 - Ieee_Std_Logic_Arith_Le_Uns_Int = 516 - Ieee_Std_Logic_Arith_Le_Int_Uns = 517 - Ieee_Std_Logic_Arith_Le_Sgn_Int = 518 - Ieee_Std_Logic_Arith_Le_Int_Sgn = 519 - Ieee_Std_Logic_Arith_Gt_Uns_Uns = 520 - Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 521 - Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 522 - Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 523 - Ieee_Std_Logic_Arith_Gt_Uns_Int = 524 - Ieee_Std_Logic_Arith_Gt_Int_Uns = 525 - Ieee_Std_Logic_Arith_Gt_Sgn_Int = 526 - Ieee_Std_Logic_Arith_Gt_Int_Sgn = 527 - Ieee_Std_Logic_Arith_Ge_Uns_Uns = 528 - Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 529 - Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 530 - Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 531 - Ieee_Std_Logic_Arith_Ge_Uns_Int = 532 - Ieee_Std_Logic_Arith_Ge_Int_Uns = 533 - Ieee_Std_Logic_Arith_Ge_Sgn_Int = 534 - Ieee_Std_Logic_Arith_Ge_Int_Sgn = 535 - Ieee_Std_Logic_Arith_Eq_Uns_Uns = 536 - Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 537 - Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 538 - Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 539 - Ieee_Std_Logic_Arith_Eq_Uns_Int = 540 - Ieee_Std_Logic_Arith_Eq_Int_Uns = 541 - Ieee_Std_Logic_Arith_Eq_Sgn_Int = 542 - Ieee_Std_Logic_Arith_Eq_Int_Sgn = 543 - Ieee_Std_Logic_Arith_Ne_Uns_Uns = 544 - Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 545 - Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 546 - Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 547 - Ieee_Std_Logic_Arith_Ne_Uns_Int = 548 - Ieee_Std_Logic_Arith_Ne_Int_Uns = 549 - Ieee_Std_Logic_Arith_Ne_Sgn_Int = 550 - Ieee_Std_Logic_Arith_Ne_Int_Sgn = 551 - Ieee_Std_Logic_Misc_And_Reduce_Slv = 552 - Ieee_Std_Logic_Misc_And_Reduce_Suv = 553 - Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 554 - Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 555 - Ieee_Std_Logic_Misc_Or_Reduce_Slv = 556 - Ieee_Std_Logic_Misc_Or_Reduce_Suv = 557 - Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 558 - Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 559 - Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 560 - Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 561 - Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 562 - Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 563 + Ieee_1164_And_Suv = 202 + Ieee_1164_Nand_Suv = 203 + Ieee_1164_Or_Suv = 204 + Ieee_1164_Nor_Suv = 205 + Ieee_1164_Xor_Suv = 206 + Ieee_1164_Xnor_Suv = 207 + Ieee_1164_Vector_Sll = 208 + Ieee_1164_Vector_Srl = 209 + Ieee_1164_Vector_Rol = 210 + Ieee_1164_Vector_Ror = 211 + Ieee_1164_Condition_Operator = 212 + Ieee_Numeric_Std_Toint_Uns_Nat = 213 + Ieee_Numeric_Std_Toint_Sgn_Int = 214 + Ieee_Numeric_Std_Touns_Nat_Nat_Uns = 215 + Ieee_Numeric_Std_Touns_Nat_Uns_Uns = 216 + Ieee_Numeric_Std_Tosgn_Int_Nat_Sgn = 217 + Ieee_Numeric_Std_Tosgn_Int_Sgn_Sgn = 218 + Ieee_Numeric_Std_Resize_Uns_Nat = 219 + Ieee_Numeric_Std_Resize_Sgn_Nat = 220 + Ieee_Numeric_Std_Resize_Uns_Uns = 221 + Ieee_Numeric_Std_Resize_Sgn_Sgn = 222 + Ieee_Numeric_Std_Add_Uns_Uns = 223 + Ieee_Numeric_Std_Add_Uns_Nat = 224 + Ieee_Numeric_Std_Add_Nat_Uns = 225 + Ieee_Numeric_Std_Add_Uns_Log = 226 + Ieee_Numeric_Std_Add_Log_Uns = 227 + Ieee_Numeric_Std_Add_Sgn_Sgn = 228 + Ieee_Numeric_Std_Add_Sgn_Int = 229 + Ieee_Numeric_Std_Add_Int_Sgn = 230 + Ieee_Numeric_Std_Add_Sgn_Log = 231 + Ieee_Numeric_Std_Add_Log_Sgn = 232 + Ieee_Numeric_Std_Sub_Uns_Uns = 233 + Ieee_Numeric_Std_Sub_Uns_Nat = 234 + Ieee_Numeric_Std_Sub_Nat_Uns = 235 + Ieee_Numeric_Std_Sub_Uns_Log = 236 + Ieee_Numeric_Std_Sub_Log_Uns = 237 + Ieee_Numeric_Std_Sub_Sgn_Sgn = 238 + Ieee_Numeric_Std_Sub_Sgn_Int = 239 + Ieee_Numeric_Std_Sub_Int_Sgn = 240 + Ieee_Numeric_Std_Sub_Sgn_Log = 241 + Ieee_Numeric_Std_Sub_Log_Sgn = 242 + Ieee_Numeric_Std_Mul_Uns_Uns = 243 + Ieee_Numeric_Std_Mul_Uns_Nat = 244 + Ieee_Numeric_Std_Mul_Nat_Uns = 245 + Ieee_Numeric_Std_Mul_Sgn_Sgn = 246 + Ieee_Numeric_Std_Mul_Sgn_Int = 247 + Ieee_Numeric_Std_Mul_Int_Sgn = 248 + Ieee_Numeric_Std_Div_Uns_Uns = 249 + Ieee_Numeric_Std_Div_Uns_Nat = 250 + Ieee_Numeric_Std_Div_Nat_Uns = 251 + Ieee_Numeric_Std_Div_Sgn_Sgn = 252 + Ieee_Numeric_Std_Div_Sgn_Int = 253 + Ieee_Numeric_Std_Div_Int_Sgn = 254 + Ieee_Numeric_Std_Rem_Uns_Uns = 255 + Ieee_Numeric_Std_Rem_Uns_Nat = 256 + Ieee_Numeric_Std_Rem_Nat_Uns = 257 + Ieee_Numeric_Std_Rem_Sgn_Sgn = 258 + Ieee_Numeric_Std_Rem_Sgn_Int = 259 + Ieee_Numeric_Std_Rem_Int_Sgn = 260 + Ieee_Numeric_Std_Mod_Uns_Uns = 261 + Ieee_Numeric_Std_Mod_Uns_Nat = 262 + Ieee_Numeric_Std_Mod_Nat_Uns = 263 + Ieee_Numeric_Std_Mod_Sgn_Sgn = 264 + Ieee_Numeric_Std_Mod_Sgn_Int = 265 + Ieee_Numeric_Std_Mod_Int_Sgn = 266 + Ieee_Numeric_Std_Gt_Uns_Uns = 267 + Ieee_Numeric_Std_Gt_Uns_Nat = 268 + Ieee_Numeric_Std_Gt_Nat_Uns = 269 + Ieee_Numeric_Std_Gt_Sgn_Sgn = 270 + Ieee_Numeric_Std_Gt_Sgn_Int = 271 + Ieee_Numeric_Std_Gt_Int_Sgn = 272 + Ieee_Numeric_Std_Lt_Uns_Uns = 273 + Ieee_Numeric_Std_Lt_Uns_Nat = 274 + Ieee_Numeric_Std_Lt_Nat_Uns = 275 + Ieee_Numeric_Std_Lt_Sgn_Sgn = 276 + Ieee_Numeric_Std_Lt_Sgn_Int = 277 + Ieee_Numeric_Std_Lt_Int_Sgn = 278 + Ieee_Numeric_Std_Le_Uns_Uns = 279 + Ieee_Numeric_Std_Le_Uns_Nat = 280 + Ieee_Numeric_Std_Le_Nat_Uns = 281 + Ieee_Numeric_Std_Le_Sgn_Sgn = 282 + Ieee_Numeric_Std_Le_Sgn_Int = 283 + Ieee_Numeric_Std_Le_Int_Sgn = 284 + Ieee_Numeric_Std_Ge_Uns_Uns = 285 + Ieee_Numeric_Std_Ge_Uns_Nat = 286 + Ieee_Numeric_Std_Ge_Nat_Uns = 287 + Ieee_Numeric_Std_Ge_Sgn_Sgn = 288 + Ieee_Numeric_Std_Ge_Sgn_Int = 289 + Ieee_Numeric_Std_Ge_Int_Sgn = 290 + Ieee_Numeric_Std_Eq_Uns_Uns = 291 + Ieee_Numeric_Std_Eq_Uns_Nat = 292 + Ieee_Numeric_Std_Eq_Nat_Uns = 293 + Ieee_Numeric_Std_Eq_Sgn_Sgn = 294 + Ieee_Numeric_Std_Eq_Sgn_Int = 295 + Ieee_Numeric_Std_Eq_Int_Sgn = 296 + Ieee_Numeric_Std_Ne_Uns_Uns = 297 + Ieee_Numeric_Std_Ne_Uns_Nat = 298 + Ieee_Numeric_Std_Ne_Nat_Uns = 299 + Ieee_Numeric_Std_Ne_Sgn_Sgn = 300 + Ieee_Numeric_Std_Ne_Sgn_Int = 301 + Ieee_Numeric_Std_Ne_Int_Sgn = 302 + Ieee_Numeric_Std_Match_Gt_Uns_Uns = 303 + Ieee_Numeric_Std_Match_Gt_Uns_Nat = 304 + Ieee_Numeric_Std_Match_Gt_Nat_Uns = 305 + Ieee_Numeric_Std_Match_Gt_Sgn_Sgn = 306 + Ieee_Numeric_Std_Match_Gt_Sgn_Int = 307 + Ieee_Numeric_Std_Match_Gt_Int_Sgn = 308 + Ieee_Numeric_Std_Match_Lt_Uns_Uns = 309 + Ieee_Numeric_Std_Match_Lt_Uns_Nat = 310 + Ieee_Numeric_Std_Match_Lt_Nat_Uns = 311 + Ieee_Numeric_Std_Match_Lt_Sgn_Sgn = 312 + Ieee_Numeric_Std_Match_Lt_Sgn_Int = 313 + Ieee_Numeric_Std_Match_Lt_Int_Sgn = 314 + Ieee_Numeric_Std_Match_Le_Uns_Uns = 315 + Ieee_Numeric_Std_Match_Le_Uns_Nat = 316 + Ieee_Numeric_Std_Match_Le_Nat_Uns = 317 + Ieee_Numeric_Std_Match_Le_Sgn_Sgn = 318 + Ieee_Numeric_Std_Match_Le_Sgn_Int = 319 + Ieee_Numeric_Std_Match_Le_Int_Sgn = 320 + Ieee_Numeric_Std_Match_Ge_Uns_Uns = 321 + Ieee_Numeric_Std_Match_Ge_Uns_Nat = 322 + Ieee_Numeric_Std_Match_Ge_Nat_Uns = 323 + Ieee_Numeric_Std_Match_Ge_Sgn_Sgn = 324 + Ieee_Numeric_Std_Match_Ge_Sgn_Int = 325 + Ieee_Numeric_Std_Match_Ge_Int_Sgn = 326 + Ieee_Numeric_Std_Match_Eq_Uns_Uns = 327 + Ieee_Numeric_Std_Match_Eq_Uns_Nat = 328 + Ieee_Numeric_Std_Match_Eq_Nat_Uns = 329 + Ieee_Numeric_Std_Match_Eq_Sgn_Sgn = 330 + Ieee_Numeric_Std_Match_Eq_Sgn_Int = 331 + Ieee_Numeric_Std_Match_Eq_Int_Sgn = 332 + Ieee_Numeric_Std_Match_Ne_Uns_Uns = 333 + Ieee_Numeric_Std_Match_Ne_Uns_Nat = 334 + Ieee_Numeric_Std_Match_Ne_Nat_Uns = 335 + Ieee_Numeric_Std_Match_Ne_Sgn_Sgn = 336 + Ieee_Numeric_Std_Match_Ne_Sgn_Int = 337 + Ieee_Numeric_Std_Match_Ne_Int_Sgn = 338 + Ieee_Numeric_Std_Sll_Uns_Int = 339 + Ieee_Numeric_Std_Sll_Sgn_Int = 340 + Ieee_Numeric_Std_Srl_Uns_Int = 341 + Ieee_Numeric_Std_Srl_Sgn_Int = 342 + Ieee_Numeric_Std_Sla_Uns_Int = 343 + Ieee_Numeric_Std_Sla_Sgn_Int = 344 + Ieee_Numeric_Std_Sra_Uns_Int = 345 + Ieee_Numeric_Std_Sra_Sgn_Int = 346 + Ieee_Numeric_Std_And_Uns_Uns = 347 + Ieee_Numeric_Std_And_Sgn_Sgn = 348 + Ieee_Numeric_Std_Or_Uns_Uns = 349 + Ieee_Numeric_Std_Or_Sgn_Sgn = 350 + Ieee_Numeric_Std_Nand_Uns_Uns = 351 + Ieee_Numeric_Std_Nand_Sgn_Sgn = 352 + Ieee_Numeric_Std_Nor_Uns_Uns = 353 + Ieee_Numeric_Std_Nor_Sgn_Sgn = 354 + Ieee_Numeric_Std_Xor_Uns_Uns = 355 + Ieee_Numeric_Std_Xor_Sgn_Sgn = 356 + Ieee_Numeric_Std_Xnor_Uns_Uns = 357 + Ieee_Numeric_Std_Xnor_Sgn_Sgn = 358 + Ieee_Numeric_Std_Not_Uns = 359 + Ieee_Numeric_Std_Not_Sgn = 360 + Ieee_Numeric_Std_Abs_Sgn = 361 + Ieee_Numeric_Std_Neg_Uns = 362 + Ieee_Numeric_Std_Neg_Sgn = 363 + Ieee_Numeric_Std_Min_Uns_Uns = 364 + Ieee_Numeric_Std_Min_Uns_Nat = 365 + Ieee_Numeric_Std_Min_Nat_Uns = 366 + Ieee_Numeric_Std_Min_Sgn_Sgn = 367 + Ieee_Numeric_Std_Min_Sgn_Int = 368 + Ieee_Numeric_Std_Min_Int_Sgn = 369 + Ieee_Numeric_Std_Max_Uns_Uns = 370 + Ieee_Numeric_Std_Max_Uns_Nat = 371 + Ieee_Numeric_Std_Max_Nat_Uns = 372 + Ieee_Numeric_Std_Max_Sgn_Sgn = 373 + Ieee_Numeric_Std_Max_Sgn_Int = 374 + Ieee_Numeric_Std_Max_Int_Sgn = 375 + Ieee_Numeric_Std_Shf_Left_Uns_Nat = 376 + Ieee_Numeric_Std_Shf_Right_Uns_Nat = 377 + Ieee_Numeric_Std_Shf_Left_Sgn_Nat = 378 + Ieee_Numeric_Std_Shf_Right_Sgn_Nat = 379 + Ieee_Numeric_Std_Rot_Left_Uns_Nat = 380 + Ieee_Numeric_Std_Rot_Right_Uns_Nat = 381 + Ieee_Numeric_Std_Rot_Left_Sgn_Nat = 382 + Ieee_Numeric_Std_Rot_Right_Sgn_Nat = 383 + Ieee_Numeric_Std_Match_Log = 384 + Ieee_Numeric_Std_Match_Uns = 385 + Ieee_Numeric_Std_Match_Sgn = 386 + Ieee_Numeric_Std_Match_Slv = 387 + Ieee_Numeric_Std_Match_Suv = 388 + Ieee_Numeric_Std_To_01_Uns = 389 + Ieee_Numeric_Std_To_01_Sgn = 390 + Ieee_Math_Real_Ceil = 391 + Ieee_Math_Real_Floor = 392 + Ieee_Math_Real_Round = 393 + Ieee_Math_Real_Log2 = 394 + Ieee_Math_Real_Sin = 395 + Ieee_Math_Real_Cos = 396 + Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 397 + Ieee_Std_Logic_Unsigned_Add_Slv_Int = 398 + Ieee_Std_Logic_Unsigned_Add_Int_Slv = 399 + Ieee_Std_Logic_Unsigned_Add_Slv_Log = 400 + Ieee_Std_Logic_Unsigned_Add_Log_Slv = 401 + Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 402 + Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 403 + Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 404 + Ieee_Std_Logic_Unsigned_Sub_Slv_Log = 405 + Ieee_Std_Logic_Unsigned_Sub_Log_Slv = 406 + Ieee_Std_Logic_Unsigned_Mul_Slv_Slv = 407 + Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 408 + Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 409 + Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 410 + Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 411 + Ieee_Std_Logic_Unsigned_Le_Slv_Int = 412 + Ieee_Std_Logic_Unsigned_Le_Int_Slv = 413 + Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 414 + Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 415 + Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 416 + Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 417 + Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 418 + Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 419 + Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 420 + Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 421 + Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 422 + Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 423 + Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 424 + Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 425 + Ieee_Std_Logic_Unsigned_Conv_Integer = 426 + Ieee_Std_Logic_Signed_Add_Slv_Slv = 427 + Ieee_Std_Logic_Signed_Add_Slv_Int = 428 + Ieee_Std_Logic_Signed_Add_Int_Slv = 429 + Ieee_Std_Logic_Signed_Add_Slv_Log = 430 + Ieee_Std_Logic_Signed_Add_Log_Slv = 431 + Ieee_Std_Logic_Signed_Sub_Slv_Slv = 432 + Ieee_Std_Logic_Signed_Sub_Slv_Int = 433 + Ieee_Std_Logic_Signed_Sub_Int_Slv = 434 + Ieee_Std_Logic_Signed_Sub_Slv_Log = 435 + Ieee_Std_Logic_Signed_Sub_Log_Slv = 436 + Ieee_Std_Logic_Signed_Mul_Slv_Slv = 437 + Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 438 + Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 439 + Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 440 + Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 441 + Ieee_Std_Logic_Arith_Conv_Integer_Int = 442 + Ieee_Std_Logic_Arith_Conv_Integer_Uns = 443 + Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 444 + Ieee_Std_Logic_Arith_Conv_Integer_Log = 445 + Ieee_Std_Logic_Arith_Conv_Vector_Int = 446 + Ieee_Std_Logic_Arith_Conv_Vector_Uns = 447 + Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 448 + Ieee_Std_Logic_Arith_Conv_Vector_Log = 449 + Ieee_Std_Logic_Arith_Ext = 450 + Ieee_Std_Logic_Arith_Sxt = 451 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 452 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 453 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 454 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 455 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 456 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 457 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 458 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 459 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 460 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 461 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 462 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 463 + Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 464 + Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 465 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 466 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 467 + Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 468 + Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 469 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 470 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 471 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 472 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 473 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 474 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 475 + Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 476 + Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 477 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 478 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 479 + Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 480 + Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 481 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 482 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 483 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 484 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 485 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 486 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 487 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 488 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 489 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 490 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 491 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 492 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 493 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 494 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 495 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 496 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 497 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 498 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 499 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 500 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 501 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 502 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 503 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 504 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 505 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 506 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 507 + Ieee_Std_Logic_Arith_Lt_Uns_Uns = 508 + Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 509 + Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 510 + Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 511 + Ieee_Std_Logic_Arith_Lt_Uns_Int = 512 + Ieee_Std_Logic_Arith_Lt_Int_Uns = 513 + Ieee_Std_Logic_Arith_Lt_Sgn_Int = 514 + Ieee_Std_Logic_Arith_Lt_Int_Sgn = 515 + Ieee_Std_Logic_Arith_Le_Uns_Uns = 516 + Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 517 + Ieee_Std_Logic_Arith_Le_Uns_Sgn = 518 + Ieee_Std_Logic_Arith_Le_Sgn_Uns = 519 + Ieee_Std_Logic_Arith_Le_Uns_Int = 520 + Ieee_Std_Logic_Arith_Le_Int_Uns = 521 + Ieee_Std_Logic_Arith_Le_Sgn_Int = 522 + Ieee_Std_Logic_Arith_Le_Int_Sgn = 523 + Ieee_Std_Logic_Arith_Gt_Uns_Uns = 524 + Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 525 + Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 526 + Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 527 + Ieee_Std_Logic_Arith_Gt_Uns_Int = 528 + Ieee_Std_Logic_Arith_Gt_Int_Uns = 529 + Ieee_Std_Logic_Arith_Gt_Sgn_Int = 530 + Ieee_Std_Logic_Arith_Gt_Int_Sgn = 531 + Ieee_Std_Logic_Arith_Ge_Uns_Uns = 532 + Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 533 + Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 534 + Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 535 + Ieee_Std_Logic_Arith_Ge_Uns_Int = 536 + Ieee_Std_Logic_Arith_Ge_Int_Uns = 537 + Ieee_Std_Logic_Arith_Ge_Sgn_Int = 538 + Ieee_Std_Logic_Arith_Ge_Int_Sgn = 539 + Ieee_Std_Logic_Arith_Eq_Uns_Uns = 540 + Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 541 + Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 542 + Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 543 + Ieee_Std_Logic_Arith_Eq_Uns_Int = 544 + Ieee_Std_Logic_Arith_Eq_Int_Uns = 545 + Ieee_Std_Logic_Arith_Eq_Sgn_Int = 546 + Ieee_Std_Logic_Arith_Eq_Int_Sgn = 547 + Ieee_Std_Logic_Arith_Ne_Uns_Uns = 548 + Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 549 + Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 550 + Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 551 + Ieee_Std_Logic_Arith_Ne_Uns_Int = 552 + Ieee_Std_Logic_Arith_Ne_Int_Uns = 553 + Ieee_Std_Logic_Arith_Ne_Sgn_Int = 554 + Ieee_Std_Logic_Arith_Ne_Int_Sgn = 555 + Ieee_Std_Logic_Misc_And_Reduce_Slv = 556 + Ieee_Std_Logic_Misc_And_Reduce_Suv = 557 + Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 558 + Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 559 + Ieee_Std_Logic_Misc_Or_Reduce_Slv = 560 + Ieee_Std_Logic_Misc_Or_Reduce_Suv = 561 + Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 562 + Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 563 + Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 564 + Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 565 + Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 566 + Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 567 Get_Kind = libghdl.vhdl__nodes__get_kind Get_Location = libghdl.vhdl__nodes__get_location diff --git a/src/synth/ghdlsynth_gates.h b/src/synth/ghdlsynth_gates.h index 951b9dc2b..78e4a6ef9 100644 --- a/src/synth/ghdlsynth_gates.h +++ b/src/synth/ghdlsynth_gates.h @@ -46,13 +46,14 @@ enum Module_Id { Id_Sgt = 39, Id_Red_And = 40, Id_Red_Or = 41, - Id_Concat2 = 42, - Id_Concat3 = 43, - Id_Concat4 = 44, - Id_Concatn = 45, - Id_Mux2 = 46, - Id_Mux4 = 47, - Id_Pmux = 48, + Id_Red_Xor = 42, + Id_Concat2 = 43, + Id_Concat3 = 44, + Id_Concat4 = 45, + Id_Concatn = 46, + Id_Mux2 = 47, + Id_Mux4 = 48, + Id_Pmux = 49, Id_Signal = 52, Id_Isignal = 53, Id_Output = 54, diff --git a/src/synth/netlists-builders.adb b/src/synth/netlists-builders.adb index 626debfa7..7e8f7b3f7 100644 --- a/src/synth/netlists-builders.adb +++ b/src/synth/netlists-builders.adb @@ -748,6 +748,8 @@ package body Netlists.Builders is Get_Identifier ("red_or"), Id_Red_Or); Create_Monadic_Module (Design, Res.M_Reduce (Id_Red_And), Get_Identifier ("red_and"), Id_Red_And); + Create_Monadic_Module (Design, Res.M_Reduce (Id_Red_Xor), + Get_Identifier ("red_xor"), Id_Red_Xor); Create_Edge_Module (Res); diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index ef1ebe3ff..513dadbbb 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -1296,6 +1296,22 @@ package body Netlists.Disp_Vhdl is (" \o0 <= \i0; -- reduce and" & NL, Inst); end if; end; + when Id_Red_Xor => + declare + Iw : constant Width := Get_Width (Get_Input_Net (Inst, 0)); + begin + if Iw > 1 then + Disp_Template (" \o0 <= \i0(0)", Inst); + for I in 1 .. Iw - 1 loop + Disp_Template (" xor \i0(\n0)", Inst, (0 => I)); + end loop; + Disp_Template (";" & NL, Inst); + else + Disp_Template + (" \o0 <= \i0; -- reduce xor" & NL, Inst); + end if; + end; + when Id_Posedge => Disp_Template (" \o0 <= '1' when rising_edge (\i0) else '0';" & NL, Inst); diff --git a/src/synth/netlists-gates.ads b/src/synth/netlists-gates.ads index bef8c3245..8fe40d83d 100644 --- a/src/synth/netlists-gates.ads +++ b/src/synth/netlists-gates.ads @@ -85,30 +85,31 @@ package Netlists.Gates is Id_Red_And : constant Module_Id := 40; Id_Red_Or : constant Module_Id := 41; + Id_Red_Xor : constant Module_Id := 42; - subtype Reduce_Module_Id is Module_Id range Id_Red_And .. Id_Red_Or; + subtype Reduce_Module_Id is Module_Id range Id_Red_And .. Id_Red_Xor; - Id_Concat2 : constant Module_Id := 42; - Id_Concat3 : constant Module_Id := 43; - Id_Concat4 : constant Module_Id := 44; + Id_Concat2 : constant Module_Id := 43; + Id_Concat3 : constant Module_Id := 44; + Id_Concat4 : constant Module_Id := 45; subtype Concat_Module_Id is Module_Id range Id_Concat2 .. Id_Concat4; -- Concatenation with N inputs. - Id_Concatn : constant Module_Id := 45; + Id_Concatn : constant Module_Id := 46; -- Inputs: s, i0, i1 -- Output: o - Id_Mux2 : constant Module_Id := 46; + Id_Mux2 : constant Module_Id := 47; -- Inputs: s, i0, i1, s2, s3 -- Output: o - Id_Mux4 : constant Module_Id := 47; + Id_Mux4 : constant Module_Id := 48; -- Inputs: 0: Selector as one-hot encoding -- 1: Default value (when the selector is 0) -- 2..1+W: values (2: MSB of sel, 1+W: LSB of sel) -- Output: 0: selected value - Id_Pmux : constant Module_Id := 48; + Id_Pmux : constant Module_Id := 49; subtype Mux_Module_Id is Module_Id range Id_Mux2 .. Id_Mux4; diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index a63a0a571..3059298f3 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -1430,13 +1430,18 @@ package body Synth.Oper is return Create_Value_Net (N, Create_Res_Bound (Operand)); end Synth_Vec_Monadic; - function Synth_Vec_Reduce_Monadic (Id : Reduce_Module_Id) return Valtyp + function Synth_Vec_Reduce_Monadic + (Id : Reduce_Module_Id; Neg : Boolean := False) return Valtyp is Op: constant Net := Get_Net (Ctxt, Operand); N : Net; begin N := Build_Reduce (Ctxt, Id, Op); Set_Location (N, Loc); + if Neg then + N := Build_Monadic (Ctxt, Id_Not, N); + Set_Location (N, Loc); + end if; return Create_Value_Net (N, Operand.Typ.Vec_El); end Synth_Vec_Reduce_Monadic; begin @@ -1471,10 +1476,20 @@ package body Synth.Oper is return Synth_Vec_Monadic (Id_Neg); when Iir_Predefined_Ieee_Numeric_Std_Abs_Sgn => return Synth_Vec_Monadic (Id_Abs); - when Iir_Predefined_Ieee_1164_Vector_And_Reduce => - return Synth_Vec_Reduce_Monadic(Id_Red_And); - when Iir_Predefined_Ieee_1164_Vector_Or_Reduce => - return Synth_Vec_Reduce_Monadic(Id_Red_Or); + + when Iir_Predefined_Ieee_1164_And_Suv => + return Synth_Vec_Reduce_Monadic (Id_Red_And); + when Iir_Predefined_Ieee_1164_Nand_Suv => + return Synth_Vec_Reduce_Monadic (Id_Red_And, True); + when Iir_Predefined_Ieee_1164_Or_Suv => + return Synth_Vec_Reduce_Monadic (Id_Red_Or); + when Iir_Predefined_Ieee_1164_Nor_Suv => + return Synth_Vec_Reduce_Monadic (Id_Red_Or, True); + when Iir_Predefined_Ieee_1164_Xor_Suv => + return Synth_Vec_Reduce_Monadic (Id_Red_Xor); + when Iir_Predefined_Ieee_1164_Xnor_Suv => + return Synth_Vec_Reduce_Monadic (Id_Red_Xor, True); + when Iir_Predefined_Ieee_1164_Condition_Operator => return Create_Value_Net (Get_Net (Ctxt, Operand), diff --git a/src/synth/synth-static_oper.adb b/src/synth/synth-static_oper.adb index ade651703..8b72dc3e7 100644 --- a/src/synth/synth-static_oper.adb +++ b/src/synth/synth-static_oper.adb @@ -697,7 +697,7 @@ package body Synth.Static_Oper is (Std_Ulogic'Pos (Not_Table (Read_Std_Logic (Operand.Mem, 0))), Oper_Typ); - when Iir_Predefined_Ieee_1164_Vector_Or_Reduce => + when Iir_Predefined_Ieee_1164_Or_Suv => return Synth_Vector_Reduce ('0', Operand, Or_Table); when others => diff --git a/src/vhdl/vhdl-ieee-std_logic_1164.adb b/src/vhdl/vhdl-ieee-std_logic_1164.adb index 58fe96229..bb4b12bce 100644 --- a/src/vhdl/vhdl-ieee-std_logic_1164.adb +++ b/src/vhdl/vhdl-ieee-std_logic_1164.adb @@ -375,11 +375,17 @@ package body Vhdl.Ieee.Std_Logic_1164 is when Name_Not => Predefined := Iir_Predefined_Ieee_1164_Vector_Not; when Name_And => - Predefined := - Iir_Predefined_Ieee_1164_Vector_And_Reduce; + Predefined := Iir_Predefined_Ieee_1164_And_Suv; + when Name_Nand => + Predefined := Iir_Predefined_Ieee_1164_Nand_Suv; when Name_Or => - Predefined := - Iir_Predefined_Ieee_1164_Vector_Or_Reduce; + Predefined := Iir_Predefined_Ieee_1164_Or_Suv; + when Name_Nor => + Predefined := Iir_Predefined_Ieee_1164_Nor_Suv; + when Name_Xor => + Predefined := Iir_Predefined_Ieee_1164_Xor_Suv; + when Name_Xnor => + Predefined := Iir_Predefined_Ieee_1164_Xnor_Suv; when Name_Is_X => Predefined := Iir_Predefined_Ieee_1164_Scalar_Is_X; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 2460e7bfc..8f3c003fa 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5471,8 +5471,12 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_1164_Falling_Edge, -- VHDL-2008 unary logic operators - Iir_Predefined_Ieee_1164_Vector_And_Reduce, - Iir_Predefined_Ieee_1164_Vector_Or_Reduce, + Iir_Predefined_Ieee_1164_And_Suv, + Iir_Predefined_Ieee_1164_Nand_Suv, + Iir_Predefined_Ieee_1164_Or_Suv, + Iir_Predefined_Ieee_1164_Nor_Suv, + Iir_Predefined_Ieee_1164_Xor_Suv, + Iir_Predefined_Ieee_1164_Xnor_Suv, Iir_Predefined_Ieee_1164_Vector_Sll, Iir_Predefined_Ieee_1164_Vector_Srl, |