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| -rw-r--r-- | doc/using/ImplementationOfVHDL.rst | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/doc/using/ImplementationOfVHDL.rst b/doc/using/ImplementationOfVHDL.rst index d16ccf861..90b3a56c6 100644 --- a/doc/using/ImplementationOfVHDL.rst +++ b/doc/using/ImplementationOfVHDL.rst @@ -121,8 +121,8 @@ PSL implementation A PSL statement is considered as a process, so it's not allowed within a process. -All PSL assertions must be clocked (GHDL doesn't support unclocked assertions). -Furthermore only one clock per assertion is allowed. +All PSL directives (`assert`, `assume`, `restrict`, `cover`) must be clocked (GHDL doesn't support unclocked directives). +Furthermore only one clock per directive is allowed. You can either use a default clock like this: |