diff options
| -rw-r--r-- | testsuite/gna/bug0117/repro8.vhdl | 19 | ||||
| -rwxr-xr-x | testsuite/gna/bug0117/testsuite.sh | 18 |
2 files changed, 23 insertions, 14 deletions
diff --git a/testsuite/gna/bug0117/repro8.vhdl b/testsuite/gna/bug0117/repro8.vhdl new file mode 100644 index 000000000..ec21f3efd --- /dev/null +++ b/testsuite/gna/bug0117/repro8.vhdl @@ -0,0 +1,19 @@ +entity repro8 is +end repro8; + +architecture behav of repro8 is + procedure assign (a, b : out bit_vector; val : bit_vector) is + begin + (a, b) := val; + end assign; +begin + process + variable a: bit_vector(7 downto 0); + variable b: bit_vector(3 downto 0); + begin + assign (a, b, x"012"); + assert a = x"01"; + assert b = x"2"; + wait; + end process; +end behav; diff --git a/testsuite/gna/bug0117/testsuite.sh b/testsuite/gna/bug0117/testsuite.sh index 9a2d8ff9f..0b9fde62d 100755 --- a/testsuite/gna/bug0117/testsuite.sh +++ b/testsuite/gna/bug0117/testsuite.sh @@ -3,20 +3,10 @@ . ../../testenv.sh export GHDL_STD_FLAGS=--std=08 -analyze repro1.vhdl -elab_simulate repro1 - -analyze repro4.vhdl -elab_simulate repro4 - -analyze repro5.vhdl -elab_simulate repro5 - -analyze repro6.vhdl -elab_simulate repro6 - -analyze repro7.vhdl -elab_simulate repro7 +for i in repro1 repro4 repro5 repro6 repro7 repro8; do + analyze $i.vhdl + elab_simulate $i +done clean |