diff options
| -rw-r--r-- | src/simul/simul-vhdl_elab.adb | 4 | ||||
| -rw-r--r-- | src/simul/simul-vhdl_simul.adb | 4 |
2 files changed, 3 insertions, 5 deletions
diff --git a/src/simul/simul-vhdl_elab.adb b/src/simul/simul-vhdl_elab.adb index 423862f6e..b2b0a4f2d 100644 --- a/src/simul/simul-vhdl_elab.adb +++ b/src/simul/simul-vhdl_elab.adb @@ -27,8 +27,6 @@ with Synth.Vhdl_Decls; with Synth.Vhdl_Expr; with Trans_Analyzes; -with Simul.Vhdl_Debug; - package body Simul.Vhdl_Elab is procedure Gather_Processes_1 (Inst : Synth_Instance_Acc); @@ -1008,8 +1006,6 @@ package body Simul.Vhdl_Elab is Signals_Table.Init; Drivers_Table.Init; - Simul.Vhdl_Debug.Init; - -- Init Signals_Table. Signals_Table.Set_Last (Get_Nbr_Signal); for I in Signals_Table.First .. Signals_Table.Last loop diff --git a/src/simul/simul-vhdl_simul.adb b/src/simul/simul-vhdl_simul.adb index cf9b1036e..690b052ba 100644 --- a/src/simul/simul-vhdl_simul.adb +++ b/src/simul/simul-vhdl_simul.adb @@ -51,6 +51,8 @@ with Synth.Vhdl_Static_Proc; with Synth.Flags; with Synth.Ieee.Std_Logic_1164; use Synth.Ieee.Std_Logic_1164; +with Simul.Vhdl_Debug; + with Grt.Types; use Grt.Types; with Grt.Signals; use Grt.Signals; with Grt.Options; @@ -3655,7 +3657,6 @@ package body Simul.Vhdl_Simul is -- Compute solver variables, allocate memory for quantities. procedure Create_Quantities is - use Grt.Analog_Solver; Num : Natural; Idx : Integer; Vec : F64_C_Arr_Ptr; @@ -4039,6 +4040,7 @@ package body Simul.Vhdl_Simul is Grt.Errors.Set_Error_Stream (Grt.Stdio.stdout); Elab.Debugger.Error_Hook := Grt.Errors.Fatal_Error'Access; + Simul.Vhdl_Debug.Init; pragma Assert (Areapools.Is_Empty (Expr_Pool)); |