diff options
| -rw-r--r-- | pyGHDL/libghdl/vhdl/nodes.py | 458 | ||||
| -rw-r--r-- | src/vhdl/vhdl-ieee-math_real.adb | 37 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 20 |
3 files changed, 285 insertions, 230 deletions
diff --git a/pyGHDL/libghdl/vhdl/nodes.py b/pyGHDL/libghdl/vhdl/nodes.py index 21ac206c4..4330d7fad 100644 --- a/pyGHDL/libghdl/vhdl/nodes.py +++ b/pyGHDL/libghdl/vhdl/nodes.py @@ -1709,224 +1709,246 @@ class Iir_Predefined(IntEnum): Ieee_Numeric_Std_Unsigned_Resize_Slv_Slv = 512 Ieee_Numeric_Std_Unsigned_Maximum_Slv_Slv = 513 Ieee_Numeric_Std_Unsigned_Minimum_Slv_Slv = 514 - Ieee_Math_Real_Ceil = 515 - Ieee_Math_Real_Floor = 516 - Ieee_Math_Real_Round = 517 - Ieee_Math_Real_Log2 = 518 - Ieee_Math_Real_Sin = 519 - Ieee_Math_Real_Cos = 520 - Ieee_Math_Real_Arctan = 521 - Ieee_Math_Real_Pow = 522 - Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 523 - Ieee_Std_Logic_Unsigned_Add_Slv_Int = 524 - Ieee_Std_Logic_Unsigned_Add_Int_Slv = 525 - Ieee_Std_Logic_Unsigned_Add_Slv_Log = 526 - Ieee_Std_Logic_Unsigned_Add_Log_Slv = 527 - Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 528 - Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 529 - Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 530 - Ieee_Std_Logic_Unsigned_Sub_Slv_Log = 531 - Ieee_Std_Logic_Unsigned_Sub_Log_Slv = 532 - Ieee_Std_Logic_Unsigned_Id_Slv = 533 - Ieee_Std_Logic_Unsigned_Mul_Slv_Slv = 534 - Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 535 - Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 536 - Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 537 - Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 538 - Ieee_Std_Logic_Unsigned_Le_Slv_Int = 539 - Ieee_Std_Logic_Unsigned_Le_Int_Slv = 540 - Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 541 - Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 542 - Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 543 - Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 544 - Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 545 - Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 546 - Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 547 - Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 548 - Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 549 - Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 550 - Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 551 - Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 552 - Ieee_Std_Logic_Unsigned_Conv_Integer = 553 - Ieee_Std_Logic_Unsigned_Shl = 554 - Ieee_Std_Logic_Unsigned_Shr = 555 - Ieee_Std_Logic_Signed_Add_Slv_Slv = 556 - Ieee_Std_Logic_Signed_Add_Slv_Int = 557 - Ieee_Std_Logic_Signed_Add_Int_Slv = 558 - Ieee_Std_Logic_Signed_Add_Slv_Log = 559 - Ieee_Std_Logic_Signed_Add_Log_Slv = 560 - Ieee_Std_Logic_Signed_Sub_Slv_Slv = 561 - Ieee_Std_Logic_Signed_Sub_Slv_Int = 562 - Ieee_Std_Logic_Signed_Sub_Int_Slv = 563 - Ieee_Std_Logic_Signed_Sub_Slv_Log = 564 - Ieee_Std_Logic_Signed_Sub_Log_Slv = 565 - Ieee_Std_Logic_Signed_Id_Slv = 566 - Ieee_Std_Logic_Signed_Neg_Slv = 567 - Ieee_Std_Logic_Signed_Abs_Slv = 568 - Ieee_Std_Logic_Signed_Mul_Slv_Slv = 569 - Ieee_Std_Logic_Signed_Lt_Slv_Slv = 570 - Ieee_Std_Logic_Signed_Lt_Slv_Int = 571 - Ieee_Std_Logic_Signed_Lt_Int_Slv = 572 - Ieee_Std_Logic_Signed_Le_Slv_Slv = 573 - Ieee_Std_Logic_Signed_Le_Slv_Int = 574 - Ieee_Std_Logic_Signed_Le_Int_Slv = 575 - Ieee_Std_Logic_Signed_Gt_Slv_Slv = 576 - Ieee_Std_Logic_Signed_Gt_Slv_Int = 577 - Ieee_Std_Logic_Signed_Gt_Int_Slv = 578 - Ieee_Std_Logic_Signed_Ge_Slv_Slv = 579 - Ieee_Std_Logic_Signed_Ge_Slv_Int = 580 - Ieee_Std_Logic_Signed_Ge_Int_Slv = 581 - Ieee_Std_Logic_Signed_Eq_Slv_Slv = 582 - Ieee_Std_Logic_Signed_Eq_Slv_Int = 583 - Ieee_Std_Logic_Signed_Eq_Int_Slv = 584 - Ieee_Std_Logic_Signed_Ne_Slv_Slv = 585 - Ieee_Std_Logic_Signed_Ne_Slv_Int = 586 - Ieee_Std_Logic_Signed_Ne_Int_Slv = 587 - Ieee_Std_Logic_Signed_Conv_Integer = 588 - Ieee_Std_Logic_Signed_Shl = 589 - Ieee_Std_Logic_Signed_Shr = 590 - Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 591 - Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 592 - Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 593 - Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 594 - Ieee_Std_Logic_Arith_Conv_Integer_Int = 595 - Ieee_Std_Logic_Arith_Conv_Integer_Uns = 596 - Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 597 - Ieee_Std_Logic_Arith_Conv_Integer_Log = 598 - Ieee_Std_Logic_Arith_Conv_Vector_Int = 599 - Ieee_Std_Logic_Arith_Conv_Vector_Uns = 600 - Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 601 - Ieee_Std_Logic_Arith_Conv_Vector_Log = 602 - Ieee_Std_Logic_Arith_Ext = 603 - Ieee_Std_Logic_Arith_Sxt = 604 - Ieee_Std_Logic_Arith_Id_Uns_Uns = 605 - Ieee_Std_Logic_Arith_Id_Sgn_Sgn = 606 - Ieee_Std_Logic_Arith_Neg_Sgn_Sgn = 607 - Ieee_Std_Logic_Arith_Abs_Sgn_Sgn = 608 - Ieee_Std_Logic_Arith_Shl_Uns = 609 - Ieee_Std_Logic_Arith_Shl_Sgn = 610 - Ieee_Std_Logic_Arith_Shr_Uns = 611 - Ieee_Std_Logic_Arith_Shr_Sgn = 612 - Ieee_Std_Logic_Arith_Id_Uns_Slv = 613 - Ieee_Std_Logic_Arith_Id_Sgn_Slv = 614 - Ieee_Std_Logic_Arith_Neg_Sgn_Slv = 615 - Ieee_Std_Logic_Arith_Abs_Sgn_Slv = 616 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 617 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 618 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 619 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 620 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 621 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 622 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 623 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 624 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 625 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 626 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 627 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 628 - Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 629 - Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 630 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 631 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 632 - Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 633 - Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 634 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 635 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 636 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 637 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 638 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 639 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 640 - Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 641 - Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 642 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 643 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 644 - Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 645 - Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 646 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 647 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 648 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 649 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 650 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 651 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 652 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 653 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 654 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 655 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 656 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 657 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 658 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 659 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 660 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 661 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 662 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 663 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 664 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 665 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 666 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 667 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 668 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 669 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 670 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 671 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 672 - Ieee_Std_Logic_Arith_Lt_Uns_Uns = 673 - Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 674 - Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 675 - Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 676 - Ieee_Std_Logic_Arith_Lt_Uns_Int = 677 - Ieee_Std_Logic_Arith_Lt_Int_Uns = 678 - Ieee_Std_Logic_Arith_Lt_Sgn_Int = 679 - Ieee_Std_Logic_Arith_Lt_Int_Sgn = 680 - Ieee_Std_Logic_Arith_Le_Uns_Uns = 681 - Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 682 - Ieee_Std_Logic_Arith_Le_Uns_Sgn = 683 - Ieee_Std_Logic_Arith_Le_Sgn_Uns = 684 - Ieee_Std_Logic_Arith_Le_Uns_Int = 685 - Ieee_Std_Logic_Arith_Le_Int_Uns = 686 - Ieee_Std_Logic_Arith_Le_Sgn_Int = 687 - Ieee_Std_Logic_Arith_Le_Int_Sgn = 688 - Ieee_Std_Logic_Arith_Gt_Uns_Uns = 689 - Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 690 - Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 691 - Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 692 - Ieee_Std_Logic_Arith_Gt_Uns_Int = 693 - Ieee_Std_Logic_Arith_Gt_Int_Uns = 694 - Ieee_Std_Logic_Arith_Gt_Sgn_Int = 695 - Ieee_Std_Logic_Arith_Gt_Int_Sgn = 696 - Ieee_Std_Logic_Arith_Ge_Uns_Uns = 697 - Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 698 - Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 699 - Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 700 - Ieee_Std_Logic_Arith_Ge_Uns_Int = 701 - Ieee_Std_Logic_Arith_Ge_Int_Uns = 702 - Ieee_Std_Logic_Arith_Ge_Sgn_Int = 703 - Ieee_Std_Logic_Arith_Ge_Int_Sgn = 704 - Ieee_Std_Logic_Arith_Eq_Uns_Uns = 705 - Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 706 - Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 707 - Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 708 - Ieee_Std_Logic_Arith_Eq_Uns_Int = 709 - Ieee_Std_Logic_Arith_Eq_Int_Uns = 710 - Ieee_Std_Logic_Arith_Eq_Sgn_Int = 711 - Ieee_Std_Logic_Arith_Eq_Int_Sgn = 712 - Ieee_Std_Logic_Arith_Ne_Uns_Uns = 713 - Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 714 - Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 715 - Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 716 - Ieee_Std_Logic_Arith_Ne_Uns_Int = 717 - Ieee_Std_Logic_Arith_Ne_Int_Uns = 718 - Ieee_Std_Logic_Arith_Ne_Sgn_Int = 719 - Ieee_Std_Logic_Arith_Ne_Int_Sgn = 720 - Ieee_Std_Logic_Misc_And_Reduce_Slv = 721 - Ieee_Std_Logic_Misc_And_Reduce_Suv = 722 - Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 723 - Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 724 - Ieee_Std_Logic_Misc_Or_Reduce_Slv = 725 - Ieee_Std_Logic_Misc_Or_Reduce_Suv = 726 - Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 727 - Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 728 - Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 729 - Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 730 - Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 731 - Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 732 + Ieee_Math_Real_Sign = 515 + Ieee_Math_Real_Ceil = 516 + Ieee_Math_Real_Floor = 517 + Ieee_Math_Real_Round = 518 + Ieee_Math_Real_Trunc = 519 + Ieee_Math_Real_Mod = 520 + Ieee_Math_Real_Realmax = 521 + Ieee_Math_Real_Realmin = 522 + Ieee_Math_Real_Sqrt = 523 + Ieee_Math_Real_Cbrt = 524 + Ieee_Math_Real_Pow_Int_Real = 525 + Ieee_Math_Real_Pow_Real_Real = 526 + Ieee_Math_Real_Exp = 527 + Ieee_Math_Real_Log = 528 + Ieee_Math_Real_Log2 = 529 + Ieee_Math_Real_Log10 = 530 + Ieee_Math_Real_Log_Real_Real = 531 + Ieee_Math_Real_Sin = 532 + Ieee_Math_Real_Cos = 533 + Ieee_Math_Real_Tan = 534 + Ieee_Math_Real_Arcsin = 535 + Ieee_Math_Real_Arccos = 536 + Ieee_Math_Real_Arctan = 537 + Ieee_Math_Real_Arctan_Real_Real = 538 + Ieee_Math_Real_Sinh = 539 + Ieee_Math_Real_Cosh = 540 + Ieee_Math_Real_Tanh = 541 + Ieee_Math_Real_Arcsinh = 542 + Ieee_Math_Real_Arccosh = 543 + Ieee_Math_Real_Arctanh = 544 + Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 545 + Ieee_Std_Logic_Unsigned_Add_Slv_Int = 546 + Ieee_Std_Logic_Unsigned_Add_Int_Slv = 547 + Ieee_Std_Logic_Unsigned_Add_Slv_Log = 548 + Ieee_Std_Logic_Unsigned_Add_Log_Slv = 549 + Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 550 + Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 551 + Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 552 + Ieee_Std_Logic_Unsigned_Sub_Slv_Log = 553 + Ieee_Std_Logic_Unsigned_Sub_Log_Slv = 554 + Ieee_Std_Logic_Unsigned_Id_Slv = 555 + Ieee_Std_Logic_Unsigned_Mul_Slv_Slv = 556 + Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 557 + Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 558 + Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 559 + Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 560 + Ieee_Std_Logic_Unsigned_Le_Slv_Int = 561 + Ieee_Std_Logic_Unsigned_Le_Int_Slv = 562 + Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 563 + Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 564 + Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 565 + Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 566 + Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 567 + Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 568 + Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 569 + Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 570 + Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 571 + Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 572 + Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 573 + Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 574 + Ieee_Std_Logic_Unsigned_Conv_Integer = 575 + Ieee_Std_Logic_Unsigned_Shl = 576 + Ieee_Std_Logic_Unsigned_Shr = 577 + Ieee_Std_Logic_Signed_Add_Slv_Slv = 578 + Ieee_Std_Logic_Signed_Add_Slv_Int = 579 + Ieee_Std_Logic_Signed_Add_Int_Slv = 580 + Ieee_Std_Logic_Signed_Add_Slv_Log = 581 + Ieee_Std_Logic_Signed_Add_Log_Slv = 582 + Ieee_Std_Logic_Signed_Sub_Slv_Slv = 583 + Ieee_Std_Logic_Signed_Sub_Slv_Int = 584 + Ieee_Std_Logic_Signed_Sub_Int_Slv = 585 + Ieee_Std_Logic_Signed_Sub_Slv_Log = 586 + Ieee_Std_Logic_Signed_Sub_Log_Slv = 587 + Ieee_Std_Logic_Signed_Id_Slv = 588 + Ieee_Std_Logic_Signed_Neg_Slv = 589 + Ieee_Std_Logic_Signed_Abs_Slv = 590 + Ieee_Std_Logic_Signed_Mul_Slv_Slv = 591 + Ieee_Std_Logic_Signed_Lt_Slv_Slv = 592 + Ieee_Std_Logic_Signed_Lt_Slv_Int = 593 + Ieee_Std_Logic_Signed_Lt_Int_Slv = 594 + Ieee_Std_Logic_Signed_Le_Slv_Slv = 595 + Ieee_Std_Logic_Signed_Le_Slv_Int = 596 + Ieee_Std_Logic_Signed_Le_Int_Slv = 597 + Ieee_Std_Logic_Signed_Gt_Slv_Slv = 598 + Ieee_Std_Logic_Signed_Gt_Slv_Int = 599 + Ieee_Std_Logic_Signed_Gt_Int_Slv = 600 + Ieee_Std_Logic_Signed_Ge_Slv_Slv = 601 + Ieee_Std_Logic_Signed_Ge_Slv_Int = 602 + Ieee_Std_Logic_Signed_Ge_Int_Slv = 603 + Ieee_Std_Logic_Signed_Eq_Slv_Slv = 604 + Ieee_Std_Logic_Signed_Eq_Slv_Int = 605 + Ieee_Std_Logic_Signed_Eq_Int_Slv = 606 + Ieee_Std_Logic_Signed_Ne_Slv_Slv = 607 + Ieee_Std_Logic_Signed_Ne_Slv_Int = 608 + Ieee_Std_Logic_Signed_Ne_Int_Slv = 609 + Ieee_Std_Logic_Signed_Conv_Integer = 610 + Ieee_Std_Logic_Signed_Shl = 611 + Ieee_Std_Logic_Signed_Shr = 612 + Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 613 + Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 614 + Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 615 + Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 616 + Ieee_Std_Logic_Arith_Conv_Integer_Int = 617 + Ieee_Std_Logic_Arith_Conv_Integer_Uns = 618 + Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 619 + Ieee_Std_Logic_Arith_Conv_Integer_Log = 620 + Ieee_Std_Logic_Arith_Conv_Vector_Int = 621 + Ieee_Std_Logic_Arith_Conv_Vector_Uns = 622 + Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 623 + Ieee_Std_Logic_Arith_Conv_Vector_Log = 624 + Ieee_Std_Logic_Arith_Ext = 625 + Ieee_Std_Logic_Arith_Sxt = 626 + Ieee_Std_Logic_Arith_Id_Uns_Uns = 627 + Ieee_Std_Logic_Arith_Id_Sgn_Sgn = 628 + Ieee_Std_Logic_Arith_Neg_Sgn_Sgn = 629 + Ieee_Std_Logic_Arith_Abs_Sgn_Sgn = 630 + Ieee_Std_Logic_Arith_Shl_Uns = 631 + Ieee_Std_Logic_Arith_Shl_Sgn = 632 + Ieee_Std_Logic_Arith_Shr_Uns = 633 + Ieee_Std_Logic_Arith_Shr_Sgn = 634 + Ieee_Std_Logic_Arith_Id_Uns_Slv = 635 + Ieee_Std_Logic_Arith_Id_Sgn_Slv = 636 + Ieee_Std_Logic_Arith_Neg_Sgn_Slv = 637 + Ieee_Std_Logic_Arith_Abs_Sgn_Slv = 638 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 639 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 640 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 641 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 642 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 643 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 644 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 645 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 646 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 647 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 648 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 649 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 650 + Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 651 + Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 652 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 653 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 654 + Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 655 + Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 656 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 657 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 658 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 659 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 660 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 661 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 662 + Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 663 + Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 664 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 665 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 666 + Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 667 + Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 668 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 669 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 670 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 671 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 672 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 673 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 674 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 675 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 676 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 677 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 678 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 679 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 680 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 681 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 682 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 683 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 684 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 685 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 686 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 687 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 688 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 689 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 690 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 691 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 692 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 693 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 694 + Ieee_Std_Logic_Arith_Lt_Uns_Uns = 695 + Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 696 + Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 697 + Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 698 + Ieee_Std_Logic_Arith_Lt_Uns_Int = 699 + Ieee_Std_Logic_Arith_Lt_Int_Uns = 700 + Ieee_Std_Logic_Arith_Lt_Sgn_Int = 701 + Ieee_Std_Logic_Arith_Lt_Int_Sgn = 702 + Ieee_Std_Logic_Arith_Le_Uns_Uns = 703 + Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 704 + Ieee_Std_Logic_Arith_Le_Uns_Sgn = 705 + Ieee_Std_Logic_Arith_Le_Sgn_Uns = 706 + Ieee_Std_Logic_Arith_Le_Uns_Int = 707 + Ieee_Std_Logic_Arith_Le_Int_Uns = 708 + Ieee_Std_Logic_Arith_Le_Sgn_Int = 709 + Ieee_Std_Logic_Arith_Le_Int_Sgn = 710 + Ieee_Std_Logic_Arith_Gt_Uns_Uns = 711 + Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 712 + Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 713 + Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 714 + Ieee_Std_Logic_Arith_Gt_Uns_Int = 715 + Ieee_Std_Logic_Arith_Gt_Int_Uns = 716 + Ieee_Std_Logic_Arith_Gt_Sgn_Int = 717 + Ieee_Std_Logic_Arith_Gt_Int_Sgn = 718 + Ieee_Std_Logic_Arith_Ge_Uns_Uns = 719 + Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 720 + Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 721 + Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 722 + Ieee_Std_Logic_Arith_Ge_Uns_Int = 723 + Ieee_Std_Logic_Arith_Ge_Int_Uns = 724 + Ieee_Std_Logic_Arith_Ge_Sgn_Int = 725 + Ieee_Std_Logic_Arith_Ge_Int_Sgn = 726 + Ieee_Std_Logic_Arith_Eq_Uns_Uns = 727 + Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 728 + Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 729 + Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 730 + Ieee_Std_Logic_Arith_Eq_Uns_Int = 731 + Ieee_Std_Logic_Arith_Eq_Int_Uns = 732 + Ieee_Std_Logic_Arith_Eq_Sgn_Int = 733 + Ieee_Std_Logic_Arith_Eq_Int_Sgn = 734 + Ieee_Std_Logic_Arith_Ne_Uns_Uns = 735 + Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 736 + Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 737 + Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 738 + Ieee_Std_Logic_Arith_Ne_Uns_Int = 739 + Ieee_Std_Logic_Arith_Ne_Int_Uns = 740 + Ieee_Std_Logic_Arith_Ne_Sgn_Int = 741 + Ieee_Std_Logic_Arith_Ne_Int_Sgn = 742 + Ieee_Std_Logic_Misc_And_Reduce_Slv = 743 + Ieee_Std_Logic_Misc_And_Reduce_Suv = 744 + Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 745 + Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 746 + Ieee_Std_Logic_Misc_Or_Reduce_Slv = 747 + Ieee_Std_Logic_Misc_Or_Reduce_Suv = 748 + Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 749 + Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 750 + Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 751 + Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 752 + Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 753 + Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 754 @export diff --git a/src/vhdl/vhdl-ieee-math_real.adb b/src/vhdl/vhdl-ieee-math_real.adb index d11030d49..1881bb322 100644 --- a/src/vhdl/vhdl-ieee-math_real.adb +++ b/src/vhdl/vhdl-ieee-math_real.adb @@ -16,11 +16,13 @@ with Std_Names; use Std_Names; +with Vhdl.Std_Package; + package body Vhdl.Ieee.Math_Real is procedure Extract_Declarations (Pkg : Iir_Package_Declaration) is Decl : Iir; - Predef : Iir_Predefined_Functions; + Def : Iir_Predefined_Functions; begin Math_Real_Pkg := Pkg; @@ -36,28 +38,41 @@ package body Vhdl.Ieee.Math_Real is case Get_Kind (Decl) is when Iir_Kind_Function_Declaration => - Predef := Iir_Predefined_None; + Def := Iir_Predefined_None; case Get_Identifier (Decl) is + when Name_Mod => + Def := Iir_Predefined_Ieee_Math_Real_Mod; when Name_Ceil => - Predef := Iir_Predefined_Ieee_Math_Real_Ceil; + Def := Iir_Predefined_Ieee_Math_Real_Ceil; when Name_Floor => - Predef := Iir_Predefined_Ieee_Math_Real_Floor; + Def := Iir_Predefined_Ieee_Math_Real_Floor; when Name_Round => - Predef := Iir_Predefined_Ieee_Math_Real_Round; + Def := Iir_Predefined_Ieee_Math_Real_Round; when Name_Log2 => - Predef := Iir_Predefined_Ieee_Math_Real_Log2; + Def := Iir_Predefined_Ieee_Math_Real_Log2; when Name_Sin => - Predef := Iir_Predefined_Ieee_Math_Real_Sin; + Def := Iir_Predefined_Ieee_Math_Real_Sin; when Name_Cos => - Predef := Iir_Predefined_Ieee_Math_Real_Cos; + Def := Iir_Predefined_Ieee_Math_Real_Cos; when Name_Arctan => - Predef := Iir_Predefined_Ieee_Math_Real_Arctan; + Def := Iir_Predefined_Ieee_Math_Real_Arctan; when Name_Op_Exp => - Predef := Iir_Predefined_Ieee_Math_Real_Pow; + declare + use Vhdl.Std_Package; + Inter : constant Iir := + Get_Interface_Declaration_Chain (Decl); + Itype : constant Iir := Get_Type (Inter); + begin + if Itype = Integer_Subtype_Definition then + Def := Iir_Predefined_Ieee_Math_Real_Pow_Int_Real; + elsif Itype = Real_Subtype_Definition then + Def := Iir_Predefined_Ieee_Math_Real_Pow_Real_Real; + end if; + end; when others => null; end case; - Set_Implicit_Definition (Decl, Predef); + Set_Implicit_Definition (Decl, Def); when Iir_Kind_Constant_Declaration => null; when others => diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 970063e64..f9b29cf78 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -6049,13 +6049,31 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Math_Real_Floor, Iir_Predefined_Ieee_Math_Real_Round, Iir_Predefined_Ieee_Math_Real_Trunc, + Iir_Predefined_Ieee_Math_Real_Mod, + Iir_Predefined_Ieee_Math_Real_Realmax, + Iir_Predefined_Ieee_Math_Real_Realmin, + Iir_Predefined_Ieee_Math_Real_Sqrt, + Iir_Predefined_Ieee_Math_Real_Cbrt, + Iir_Predefined_Ieee_Math_Real_Pow_Int_Real, + Iir_Predefined_Ieee_Math_Real_Pow_Real_Real, + Iir_Predefined_Ieee_Math_Real_Exp, Iir_Predefined_Ieee_Math_Real_Log, Iir_Predefined_Ieee_Math_Real_Log2, Iir_Predefined_Ieee_Math_Real_Log10, + Iir_Predefined_Ieee_Math_Real_Log_Real_Real, Iir_Predefined_Ieee_Math_Real_Sin, Iir_Predefined_Ieee_Math_Real_Cos, + Iir_Predefined_Ieee_Math_Real_Tan, + Iir_Predefined_Ieee_Math_Real_Arcsin, + Iir_Predefined_Ieee_Math_Real_Arccos, Iir_Predefined_Ieee_Math_Real_Arctan, - Iir_Predefined_Ieee_Math_Real_Pow, + Iir_Predefined_Ieee_Math_Real_Arctan_Real_Real, + Iir_Predefined_Ieee_Math_Real_Sinh, + Iir_Predefined_Ieee_Math_Real_Cosh, + Iir_Predefined_Ieee_Math_Real_Tanh, + Iir_Predefined_Ieee_Math_Real_Arcsinh, + Iir_Predefined_Ieee_Math_Real_Arccosh, + Iir_Predefined_Ieee_Math_Real_Arctanh, -- Std_Logic_Unsigned (synopsys extension). Iir_Predefined_Ieee_Std_Logic_Unsigned_Add_Slv_Slv, |