diff options
| -rw-r--r-- | src/vhdl/vhdl-configuration.adb | 20 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes_walk.adb | 77 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes_walk.ads | 4 |
3 files changed, 64 insertions, 37 deletions
diff --git a/src/vhdl/vhdl-configuration.adb b/src/vhdl/vhdl-configuration.adb index 6ca289841..d45cfc1b2 100644 --- a/src/vhdl/vhdl-configuration.adb +++ b/src/vhdl/vhdl-configuration.adb @@ -931,7 +931,8 @@ package body Vhdl.Configuration is Lib_Unit := Get_Library_Unit (Design); case Iir_Kinds_Library_Unit (Get_Kind (Lib_Unit)) is when Iir_Kind_Architecture_Body - | Iir_Kind_Configuration_Declaration => + | Iir_Kind_Configuration_Declaration + | Iir_Kinds_Verification_Unit => Load_Design_Unit (Design, Loc_Err); when Iir_Kind_Entity_Declaration => Load_Design_Unit (Design, Loc_Err); @@ -941,7 +942,6 @@ package body Vhdl.Configuration is when Iir_Kind_Package_Declaration | Iir_Kind_Package_Instantiation_Declaration | Iir_Kind_Package_Body - | Iir_Kinds_Verification_Unit | Iir_Kind_Context_Declaration => null; end case; @@ -1052,11 +1052,25 @@ package body Vhdl.Configuration is when Iir_Kind_Configuration_Declaration => -- Just ignored. null; + when Iir_Kinds_Verification_Unit => + declare + Item : Iir; + begin + Item := Get_Vunit_Item_Chain (Unit); + while Item /= Null_Iir loop + if Get_Kind (Item) in Iir_Kinds_Concurrent_Statement + then + Status := Walk_Concurrent_Statement + (Item, Mark_Instantiation_Cb'Access); + pragma Assert (Status = Walk_Continue); + end if; + Item := Get_Chain (Item); + end loop; + end; when Iir_Kind_Package_Declaration | Iir_Kind_Package_Instantiation_Declaration | Iir_Kind_Package_Body | Iir_Kind_Entity_Declaration - | Iir_Kinds_Verification_Unit | Iir_Kind_Context_Declaration => null; end case; diff --git a/src/vhdl/vhdl-nodes_walk.adb b/src/vhdl/vhdl-nodes_walk.adb index 8a39a1bd1..fdd6d0c5d 100644 --- a/src/vhdl/vhdl-nodes_walk.adb +++ b/src/vhdl/vhdl-nodes_walk.adb @@ -148,6 +148,48 @@ package body Vhdl.Nodes_Walk is end case; end Walk_Design_Units; + function Walk_Concurrent_Statement (Stmt : Iir; Cb : Walk_Cb) + return Walk_Status + is + Status : Walk_Status; + begin + case Get_Kind (Stmt) is + when Iir_Kinds_Simple_Concurrent_Statement + | Iir_Kind_Component_Instantiation_Statement + | Iir_Kind_Psl_Default_Clock => + Status := Cb.all (Stmt); + when Iir_Kind_Block_Statement => + Status := Cb.all (Stmt); + if Status = Walk_Continue then + Status := Walk_Concurrent_Statements_Chain + (Get_Concurrent_Statement_Chain (Stmt), Cb); + end if; + when Iir_Kind_For_Generate_Statement => + Status := Cb.all (Stmt); + if Status = Walk_Continue then + Status := Walk_Concurrent_Statements_Chain + (Get_Concurrent_Statement_Chain + (Get_Generate_Statement_Body (Stmt)), Cb); + end if; + when Iir_Kind_If_Generate_Statement => + declare + Cl : Node; + begin + Status := Cb.all (Stmt); + Cl := Stmt; + while Status = Walk_Continue and then Cl /= Null_Node loop + Status := Walk_Concurrent_Statements_Chain + (Get_Concurrent_Statement_Chain + (Get_Generate_Statement_Body (Cl)), Cb); + Cl := Get_Generate_Else_Clause (Cl); + end loop; + end; + when others => + Error_Kind ("walk_concurrent_statement", Stmt); + end case; + return Status; + end Walk_Concurrent_Statement; + function Walk_Concurrent_Statements_Chain (Chain : Iir; Cb : Walk_Cb) return Walk_Status is @@ -156,40 +198,7 @@ package body Vhdl.Nodes_Walk is begin El := Chain; while Is_Valid (El) loop - case Get_Kind (El) is - when Iir_Kinds_Simple_Concurrent_Statement - | Iir_Kind_Component_Instantiation_Statement - | Iir_Kind_Psl_Default_Clock => - Status := Cb.all (El); - when Iir_Kind_Block_Statement => - Status := Cb.all (El); - if Status = Walk_Continue then - Status := Walk_Concurrent_Statements_Chain - (Get_Concurrent_Statement_Chain (El), Cb); - end if; - when Iir_Kind_For_Generate_Statement => - Status := Cb.all (El); - if Status = Walk_Continue then - Status := Walk_Concurrent_Statements_Chain - (Get_Concurrent_Statement_Chain - (Get_Generate_Statement_Body (El)), Cb); - end if; - when Iir_Kind_If_Generate_Statement => - declare - Cl : Node; - begin - Status := Cb.all (El); - Cl := El; - while Status = Walk_Continue and then Cl /= Null_Node loop - Status := Walk_Concurrent_Statements_Chain - (Get_Concurrent_Statement_Chain - (Get_Generate_Statement_Body (Cl)), Cb); - Cl := Get_Generate_Else_Clause (Cl); - end loop; - end; - when others => - Error_Kind ("walk_concurrent_statements_chain", El); - end case; + Status := Walk_Concurrent_Statement (El, Cb); if Status /= Walk_Continue then return Status; end if; diff --git a/src/vhdl/vhdl-nodes_walk.ads b/src/vhdl/vhdl-nodes_walk.ads index c3c3402bb..21be61645 100644 --- a/src/vhdl/vhdl-nodes_walk.ads +++ b/src/vhdl/vhdl-nodes_walk.ads @@ -44,6 +44,10 @@ package Vhdl.Nodes_Walk is -- Walk on all design units of library or design file PARENT. function Walk_Design_Units (Parent : Iir; Cb : Walk_Cb) return Walk_Status; + -- Walk STMT (and its children if any). + function Walk_Concurrent_Statement (Stmt : Iir; Cb : Walk_Cb) + return Walk_Status; + -- Walk on all concurrent statements (and sub statements) of CHAIN. function Walk_Concurrent_Statements_Chain (Chain : Iir; Cb : Walk_Cb) return Walk_Status; |