diff options
| -rwxr-xr-x | testsuite/gna/issue1721/testsuite.sh | 2 | ||||
| -rw-r--r-- | testsuite/gna/issue1721/top2.vhdl | 27 |
2 files changed, 29 insertions, 0 deletions
diff --git a/testsuite/gna/issue1721/testsuite.sh b/testsuite/gna/issue1721/testsuite.sh index 70c249139..e4a6e56cc 100755 --- a/testsuite/gna/issue1721/testsuite.sh +++ b/testsuite/gna/issue1721/testsuite.sh @@ -7,6 +7,8 @@ export GHDL_STD_FLAGS=-fpsl analyze top1.vhdl elab_simulate top1 +analyze_failure top2.vhdl + clean echo "Test successful" diff --git a/testsuite/gna/issue1721/top2.vhdl b/testsuite/gna/issue1721/top2.vhdl new file mode 100644 index 000000000..b213d96d5 --- /dev/null +++ b/testsuite/gna/issue1721/top2.vhdl @@ -0,0 +1,27 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity top2 is +end entity; + +architecture a of top2 is + signal a,b,c,d : std_logic := '0'; + signal clk_sys, clk1, clk2 : std_logic; +begin + -- psl default clock is clk_sys; + + -- Following throws bug occured with: "build_sere_fa: cannot handle N_IMP_SEQ" + -- This is strange because with "always" this is working. + -- According to PSL LRM 2003 FL_Property production for "always" is the + -- same as for "never": + -- FL_Property ::= + -- always FL_Property + -- | always Sequence + -- + -- FL_Property ::= + -- never FL_Property + -- | never Sequence + -- Therefore I think if sequence implication works with one, it shall work + -- also with other. + -- psl my_seq : assert never {a} |=> {b; c}; +end a; |