diff options
| -rw-r--r-- | testsuite/synth/aggr01/aggr02.vhdl | 1 | ||||
| -rw-r--r-- | testsuite/synth/issue948/ent.vhdl | 22 | ||||
| -rwxr-xr-x | testsuite/synth/issue948/testsuite.sh | 11 |
3 files changed, 33 insertions, 1 deletions
diff --git a/testsuite/synth/aggr01/aggr02.vhdl b/testsuite/synth/aggr01/aggr02.vhdl index 82e83ff9c..8b117867b 100644 --- a/testsuite/synth/aggr01/aggr02.vhdl +++ b/testsuite/synth/aggr01/aggr02.vhdl @@ -17,4 +17,3 @@ architecture behav of aggr02 is begin b <= a and gen_mask (8); end behav; - diff --git a/testsuite/synth/issue948/ent.vhdl b/testsuite/synth/issue948/ent.vhdl new file mode 100644 index 000000000..a2f7aadb9 --- /dev/null +++ b/testsuite/synth/issue948/ent.vhdl @@ -0,0 +1,22 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity ent is + port ( + i : in bit; + o : out bit + ); +end; + +architecture a of ent is + signal test : std_logic_vector(7 downto 0); + alias a : std_logic_vector(7 downto 0) is test; +begin + process(i) + begin + if a = x"00" then + end if; + + o <= i; + end process; +end; diff --git a/testsuite/synth/issue948/testsuite.sh b/testsuite/synth/issue948/testsuite.sh new file mode 100755 index 000000000..54e687d28 --- /dev/null +++ b/testsuite/synth/issue948/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +for f in ent; do + synth $f.vhdl -e $f > syn_$f.vhdl +# analyze syn_$f.vhdl +done +clean + +echo "Test successful" |