Add testcase for #262

2 files changed, 27 insertions, 0 deletions

diff --git a/testsuite/gna/issue262/repro.vhdl b/testsuite/gna/issue262/repro.vhdl
new file mode 100644
index 000000000..bb4dd2965
--- /dev/null
+++ b/testsuite/gna/issue262/repro.vhdl
@@ -0,0 +1,16 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity repro is
+end;
+
+architecture behav of repro is
+begin
+  process
+    variable result : std_ulogic;
+  begin
+    result := std_ulogic_vector'("-000") ?/= std_ulogic_vector'("0000");
+    result := std_ulogic_vector'("-000") ?= std_ulogic_vector'("0000");
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/gna/issue262/testsuite.sh b/testsuite/gna/issue262/testsuite.sh
new file mode 100755
index 000000000..15fea4385
--- /dev/null
+++ b/testsuite/gna/issue262/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze repro.vhdl
+elab_simulate repro --assert-level=error
+
+clean
+
+echo "Test successful"