testsuite/gna: add more tests for #641

From SynthWorks

34 files changed, 677 insertions, 1 deletions

diff --git a/testsuite/gna/issue641/test_1a_unsigned_port/TbTest.vhd b/testsuite/gna/issue641/test_1a_unsigned_port/TbTest.vhd
new file mode 100644
index 000000000..e24014577
--- /dev/null
+++ b/testsuite/gna/issue641/test_1a_unsigned_port/TbTest.vhd
@@ -0,0 +1,34 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity TbTest is
+end entity TbTest;
+
+architecture rtl of TbTest is
+
+  component test is
+    port(
+      input : in unsigned);
+  end component test;
+
+  signal Fred : unsigned(7 downto 0) ;
+begin
+  test_1 : test 
+    port map (
+      input => Fred 
+    );
+  
+  process 
+  begin 
+    Fred <= X"00" ;
+    wait for 1 ns ;
+    for i in 1 to 10 loop
+      Fred <= X"00" + i ; 
+      wait for 1 ns ;
+    end loop ;
+    std.env.stop ;
+  end process ; 
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_1a_unsigned_port/Test.vhd b/testsuite/gna/issue641/test_1a_unsigned_port/Test.vhd
new file mode 100644
index 000000000..2d2f85cfc
--- /dev/null
+++ b/testsuite/gna/issue641/test_1a_unsigned_port/Test.vhd
@@ -0,0 +1,24 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity test is
+  port(
+    input : in unsigned
+  );
+end entity;
+
+architecture rtl of test is
+  signal copy : input'subtype;
+begin
+  copy <= input ;
+  
+  process 
+  begin 
+    wait on copy ;  -- Suppress first run
+    report "Copy = " & to_hstring(Copy) ; 
+  end process ; 
+  
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_1a_unsigned_port/TestPkg.vhd b/testsuite/gna/issue641/test_1a_unsigned_port/TestPkg.vhd
new file mode 100644
index 000000000..879e0315a
--- /dev/null
+++ b/testsuite/gna/issue641/test_1a_unsigned_port/TestPkg.vhd
@@ -0,0 +1,7 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+package TestPkg is
+
+end package TestPkg ; 
diff --git a/testsuite/gna/issue641/test_1a_unsigned_port/test_1a_unsigned_port.pro b/testsuite/gna/issue641/test_1a_unsigned_port/test_1a_unsigned_port.pro
new file mode 100644
index 000000000..e93963344
--- /dev/null
+++ b/testsuite/gna/issue641/test_1a_unsigned_port/test_1a_unsigned_port.pro
@@ -0,0 +1,6 @@
+library default
+
+analyze TestPkg.vhd
+analyze Test.vhd
+analyze TbTest.vhd
+simulate TbTest
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_1b_unsigned_alias/TbTest.vhd b/testsuite/gna/issue641/test_1b_unsigned_alias/TbTest.vhd
new file mode 100644
index 000000000..e24014577
--- /dev/null
+++ b/testsuite/gna/issue641/test_1b_unsigned_alias/TbTest.vhd
@@ -0,0 +1,34 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity TbTest is
+end entity TbTest;
+
+architecture rtl of TbTest is
+
+  component test is
+    port(
+      input : in unsigned);
+  end component test;
+
+  signal Fred : unsigned(7 downto 0) ;
+begin
+  test_1 : test 
+    port map (
+      input => Fred 
+    );
+  
+  process 
+  begin 
+    Fred <= X"00" ;
+    wait for 1 ns ;
+    for i in 1 to 10 loop
+      Fred <= X"00" + i ; 
+      wait for 1 ns ;
+    end loop ;
+    std.env.stop ;
+  end process ; 
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_1b_unsigned_alias/Test.vhd b/testsuite/gna/issue641/test_1b_unsigned_alias/Test.vhd
new file mode 100644
index 000000000..8f07e8469
--- /dev/null
+++ b/testsuite/gna/issue641/test_1b_unsigned_alias/Test.vhd
@@ -0,0 +1,25 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity test is
+  port(
+    input : in unsigned);
+end entity;
+
+architecture rtl of test is
+  signal copy : input'subtype;
+  
+  alias B is copy ; 
+begin
+  copy <= input ;
+  
+  process 
+  begin 
+    wait on copy ;  -- Suppress first run
+    report "Copy, B = " & to_hstring(Copy) & ", " & to_hstring(B) ; 
+  end process ; 
+  
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_1b_unsigned_alias/TestPkg.vhd b/testsuite/gna/issue641/test_1b_unsigned_alias/TestPkg.vhd
new file mode 100644
index 000000000..879e0315a
--- /dev/null
+++ b/testsuite/gna/issue641/test_1b_unsigned_alias/TestPkg.vhd
@@ -0,0 +1,7 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+package TestPkg is
+
+end package TestPkg ; 
diff --git a/testsuite/gna/issue641/test_1b_unsigned_alias/test_1b_unsigned_alias.pro b/testsuite/gna/issue641/test_1b_unsigned_alias/test_1b_unsigned_alias.pro
new file mode 100644
index 000000000..e93963344
--- /dev/null
+++ b/testsuite/gna/issue641/test_1b_unsigned_alias/test_1b_unsigned_alias.pro
@@ -0,0 +1,6 @@
+library default
+
+analyze TestPkg.vhd
+analyze Test.vhd
+analyze TbTest.vhd
+simulate TbTest
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2a_record_subtype/TbTest.vhd b/testsuite/gna/issue641/test_2a_record_subtype/TbTest.vhd
new file mode 100644
index 000000000..9cecebfb6
--- /dev/null
+++ b/testsuite/gna/issue641/test_2a_record_subtype/TbTest.vhd
@@ -0,0 +1,35 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity TbTest is
+end entity TbTest;
+
+architecture rtl of TbTest is
+
+  component test is
+    port(
+      input : in ARecType
+    );
+  end component test;
+
+  signal Fred : ARecType( A(7 downto 0)) ;
+begin
+  test_1 : test 
+    port map (
+      input => Fred 
+    );
+  
+  process 
+  begin 
+    Fred.A <= X"00" ;
+    wait for 1 ns ;
+    for i in 1 to 10 loop
+      Fred.A <= X"00" + i ; 
+      wait for 1 ns ;
+    end loop ;
+    std.env.stop ;
+  end process ; 
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2a_record_subtype/Test.vhd b/testsuite/gna/issue641/test_2a_record_subtype/Test.vhd
new file mode 100644
index 000000000..b0b419755
--- /dev/null
+++ b/testsuite/gna/issue641/test_2a_record_subtype/Test.vhd
@@ -0,0 +1,24 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity test is
+  port(
+    input : in ARecType 
+  );
+end entity;
+
+architecture rtl of test is
+  signal copy : input'subtype;
+begin
+  copy <= input ;
+  
+  process 
+  begin 
+    wait on copy ;  -- Suppress first run
+    report "Copy.A = " & to_hstring(Copy.A) ; 
+  end process ; 
+  
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2a_record_subtype/TestPkg.vhd b/testsuite/gna/issue641/test_2a_record_subtype/TestPkg.vhd
new file mode 100644
index 000000000..24eeaabf4
--- /dev/null
+++ b/testsuite/gna/issue641/test_2a_record_subtype/TestPkg.vhd
@@ -0,0 +1,10 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+package TestPkg is
+  type ARecType is record
+    A : unsigned ;
+  end record ARecType ; 
+
+end package TestPkg ; 
diff --git a/testsuite/gna/issue641/test_2a_record_subtype/test_2a_record_subtype.pro b/testsuite/gna/issue641/test_2a_record_subtype/test_2a_record_subtype.pro
new file mode 100644
index 000000000..e93963344
--- /dev/null
+++ b/testsuite/gna/issue641/test_2a_record_subtype/test_2a_record_subtype.pro
@@ -0,0 +1,6 @@
+library default
+
+analyze TestPkg.vhd
+analyze Test.vhd
+analyze TbTest.vhd
+simulate TbTest
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2b_record_subtype_alias/test_2b_record_subtype_alias.pro b/testsuite/gna/issue641/test_2b_record_subtype_alias/test_2b_record_subtype_alias.pro
new file mode 100644
index 000000000..e93963344
--- /dev/null
+++ b/testsuite/gna/issue641/test_2b_record_subtype_alias/test_2b_record_subtype_alias.pro
@@ -0,0 +1,6 @@
+library default
+
+analyze TestPkg.vhd
+analyze Test.vhd
+analyze TbTest.vhd
+simulate TbTest
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2c_record_range_alias/TbTest.vhd b/testsuite/gna/issue641/test_2c_record_range_alias/TbTest.vhd
new file mode 100644
index 000000000..9cecebfb6
--- /dev/null
+++ b/testsuite/gna/issue641/test_2c_record_range_alias/TbTest.vhd
@@ -0,0 +1,35 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity TbTest is
+end entity TbTest;
+
+architecture rtl of TbTest is
+
+  component test is
+    port(
+      input : in ARecType
+    );
+  end component test;
+
+  signal Fred : ARecType( A(7 downto 0)) ;
+begin
+  test_1 : test 
+    port map (
+      input => Fred 
+    );
+  
+  process 
+  begin 
+    Fred.A <= X"00" ;
+    wait for 1 ns ;
+    for i in 1 to 10 loop
+      Fred.A <= X"00" + i ; 
+      wait for 1 ns ;
+    end loop ;
+    std.env.stop ;
+  end process ; 
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2c_record_range_alias/Test.vhd b/testsuite/gna/issue641/test_2c_record_range_alias/Test.vhd
new file mode 100644
index 000000000..3668d7400
--- /dev/null
+++ b/testsuite/gna/issue641/test_2c_record_range_alias/Test.vhd
@@ -0,0 +1,27 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity test is
+  port(
+    input : in ARecType 
+  );
+end entity;
+
+architecture rtl of test is
+  signal copy : ARecType(A(input.A'range)) ; -- Works
+  
+  alias B is copy ; 
+
+begin
+  copy <= input ;
+  
+  process 
+  begin 
+    wait on copy ;  -- Suppress first run
+    report "Copy.A, B.A = " & to_hstring(Copy.A) & ", " & to_hstring(B.A) ; 
+  end process ; 
+  
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2c_record_range_alias/TestPkg.vhd b/testsuite/gna/issue641/test_2c_record_range_alias/TestPkg.vhd
new file mode 100644
index 000000000..24eeaabf4
--- /dev/null
+++ b/testsuite/gna/issue641/test_2c_record_range_alias/TestPkg.vhd
@@ -0,0 +1,10 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+package TestPkg is
+  type ARecType is record
+    A : unsigned ;
+  end record ARecType ; 
+
+end package TestPkg ; 
diff --git a/testsuite/gna/issue641/test_2c_record_range_alias/test_2c_record_range_alias.pro b/testsuite/gna/issue641/test_2c_record_range_alias/test_2c_record_range_alias.pro
new file mode 100644
index 000000000..e93963344
--- /dev/null
+++ b/testsuite/gna/issue641/test_2c_record_range_alias/test_2c_record_range_alias.pro
@@ -0,0 +1,6 @@
+library default
+
+analyze TestPkg.vhd
+analyze Test.vhd
+analyze TbTest.vhd
+simulate TbTest
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2d_record_subtype_length_decl/TbTest.vhd b/testsuite/gna/issue641/test_2d_record_subtype_length_decl/TbTest.vhd
new file mode 100644
index 000000000..9cecebfb6
--- /dev/null
+++ b/testsuite/gna/issue641/test_2d_record_subtype_length_decl/TbTest.vhd
@@ -0,0 +1,35 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity TbTest is
+end entity TbTest;
+
+architecture rtl of TbTest is
+
+  component test is
+    port(
+      input : in ARecType
+    );
+  end component test;
+
+  signal Fred : ARecType( A(7 downto 0)) ;
+begin
+  test_1 : test 
+    port map (
+      input => Fred 
+    );
+  
+  process 
+  begin 
+    Fred.A <= X"00" ;
+    wait for 1 ns ;
+    for i in 1 to 10 loop
+      Fred.A <= X"00" + i ; 
+      wait for 1 ns ;
+    end loop ;
+    std.env.stop ;
+  end process ; 
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2d_record_subtype_length_decl/Test.vhd b/testsuite/gna/issue641/test_2d_record_subtype_length_decl/Test.vhd
new file mode 100644
index 000000000..2a81249b4
--- /dev/null
+++ b/testsuite/gna/issue641/test_2d_record_subtype_length_decl/Test.vhd
@@ -0,0 +1,27 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity test is
+  port(
+    input : in ARecType 
+  );
+end entity;
+
+architecture rtl of test is
+  signal copy : input'subtype;   -- fails
+
+  constant B : integer := Copy.A'length ; 
+  
+begin
+  copy <= input ;
+  
+  process 
+  begin 
+    wait on copy ;  -- Suppress first run
+    report "Copy.A, B = " & to_hstring(Copy.A) & ", " & to_string(B) ; 
+  end process ; 
+  
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2d_record_subtype_length_decl/TestPkg.vhd b/testsuite/gna/issue641/test_2d_record_subtype_length_decl/TestPkg.vhd
new file mode 100644
index 000000000..24eeaabf4
--- /dev/null
+++ b/testsuite/gna/issue641/test_2d_record_subtype_length_decl/TestPkg.vhd
@@ -0,0 +1,10 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+package TestPkg is
+  type ARecType is record
+    A : unsigned ;
+  end record ARecType ; 
+
+end package TestPkg ; 
diff --git a/testsuite/gna/issue641/test_2d_record_subtype_length_decl/test_2d_record_subtype_length_decl.pro b/testsuite/gna/issue641/test_2d_record_subtype_length_decl/test_2d_record_subtype_length_decl.pro
new file mode 100644
index 000000000..e93963344
--- /dev/null
+++ b/testsuite/gna/issue641/test_2d_record_subtype_length_decl/test_2d_record_subtype_length_decl.pro
@@ -0,0 +1,6 @@
+library default
+
+analyze TestPkg.vhd
+analyze Test.vhd
+analyze TbTest.vhd
+simulate TbTest
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2e_record_simple_alias/TbTest.vhd b/testsuite/gna/issue641/test_2e_record_simple_alias/TbTest.vhd
new file mode 100644
index 000000000..05e0e05f8
--- /dev/null
+++ b/testsuite/gna/issue641/test_2e_record_simple_alias/TbTest.vhd
@@ -0,0 +1,35 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity TbTest is
+end entity TbTest;
+
+architecture rtl of TbTest is
+
+  component test is
+    port(
+      input : in ARecType
+    );
+  end component test;
+
+  signal Fred : ARecType ;
+begin
+  test_1 : test 
+    port map (
+      input => Fred 
+    );
+  
+  process 
+  begin 
+    Fred.A <= 0 ;
+    wait for 1 ns ;
+    for i in 1 to 10 loop
+      Fred.A <= i ; 
+      wait for 1 ns ;
+    end loop ;
+    std.env.stop ;
+  end process ; 
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2e_record_simple_alias/Test.vhd b/testsuite/gna/issue641/test_2e_record_simple_alias/Test.vhd
new file mode 100644
index 000000000..babbea3b2
--- /dev/null
+++ b/testsuite/gna/issue641/test_2e_record_simple_alias/Test.vhd
@@ -0,0 +1,27 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity test is
+  port(
+    input : in ARecType 
+  );
+end entity;
+
+architecture rtl of test is
+  alias B is input ; 
+  
+  signal Copy : ARecType ; 
+
+begin
+  copy <= input ;
+  
+  process 
+  begin 
+    wait on copy ;  -- Suppress first run
+    report "Copy.A, B.A = " & to_string(Copy.A) & ", " & to_string(B.A) ; 
+  end process ; 
+  
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2e_record_simple_alias/TestPkg.vhd b/testsuite/gna/issue641/test_2e_record_simple_alias/TestPkg.vhd
new file mode 100644
index 000000000..7ae5e6be5
--- /dev/null
+++ b/testsuite/gna/issue641/test_2e_record_simple_alias/TestPkg.vhd
@@ -0,0 +1,10 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+package TestPkg is
+  type ARecType is record
+    A : integer ;
+  end record ARecType ; 
+
+end package TestPkg ; 
diff --git a/testsuite/gna/issue641/test_2e_record_simple_alias/test_2e_record_simple_alias.pro b/testsuite/gna/issue641/test_2e_record_simple_alias/test_2e_record_simple_alias.pro
new file mode 100644
index 000000000..612699efb
--- /dev/null
+++ b/testsuite/gna/issue641/test_2e_record_simple_alias/test_2e_record_simple_alias.pro
@@ -0,0 +1,6 @@
+library test2e
+
+analyze TestPkg.vhd
+analyze Test.vhd
+analyze TbTest.vhd
+simulate TbTest
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2f_record_constrained_alias/TbTest.vhd b/testsuite/gna/issue641/test_2f_record_constrained_alias/TbTest.vhd
new file mode 100644
index 000000000..1791d8ece
--- /dev/null
+++ b/testsuite/gna/issue641/test_2f_record_constrained_alias/TbTest.vhd
@@ -0,0 +1,35 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity TbTest is
+end entity TbTest;
+
+architecture rtl of TbTest is
+
+  component test is
+    port(
+      input : in ARecType
+    );
+  end component test;
+
+  signal Fred : ARecType ;
+begin
+  test_1 : test 
+    port map (
+      input => Fred 
+    );
+  
+  process 
+  begin 
+    Fred.A <= X"00" ;
+    wait for 1 ns ;
+    for i in 1 to 10 loop
+      Fred.A <= X"00" + i ; 
+      wait for 1 ns ;
+    end loop ;
+    std.env.stop ;
+  end process ; 
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2f_record_constrained_alias/Test.vhd b/testsuite/gna/issue641/test_2f_record_constrained_alias/Test.vhd
new file mode 100644
index 000000000..cac55351a
--- /dev/null
+++ b/testsuite/gna/issue641/test_2f_record_constrained_alias/Test.vhd
@@ -0,0 +1,27 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity test is
+  port(
+    input : in ARecType 
+  );
+end entity;
+
+architecture rtl of test is
+  signal copy : input'subtype;   
+  
+  alias B is copy ; 
+
+begin
+  copy <= input ;
+  
+  process 
+  begin 
+    wait on copy ;  -- Suppress first run
+    report "Copy.A, B.A = " & to_hstring(Copy.A) & ", " & to_hstring(B.A) ; 
+  end process ; 
+  
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2f_record_constrained_alias/TestPkg.vhd b/testsuite/gna/issue641/test_2f_record_constrained_alias/TestPkg.vhd
new file mode 100644
index 000000000..e16e8c8c4
--- /dev/null
+++ b/testsuite/gna/issue641/test_2f_record_constrained_alias/TestPkg.vhd
@@ -0,0 +1,10 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+package TestPkg is
+  type ARecType is record
+    A : unsigned(7 downto 0) ;
+  end record ARecType ; 
+
+end package TestPkg ; 
diff --git a/testsuite/gna/issue641/test_2f_record_constrained_alias/test_2f_record_constrained_alias.pro b/testsuite/gna/issue641/test_2f_record_constrained_alias/test_2f_record_constrained_alias.pro
new file mode 100644
index 000000000..e93963344
--- /dev/null
+++ b/testsuite/gna/issue641/test_2f_record_constrained_alias/test_2f_record_constrained_alias.pro
@@ -0,0 +1,6 @@
+library default
+
+analyze TestPkg.vhd
+analyze Test.vhd
+analyze TbTest.vhd
+simulate TbTest
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2g_record_alias_port/TbTest.vhd b/testsuite/gna/issue641/test_2g_record_alias_port/TbTest.vhd
new file mode 100644
index 000000000..9cecebfb6
--- /dev/null
+++ b/testsuite/gna/issue641/test_2g_record_alias_port/TbTest.vhd
@@ -0,0 +1,35 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity TbTest is
+end entity TbTest;
+
+architecture rtl of TbTest is
+
+  component test is
+    port(
+      input : in ARecType
+    );
+  end component test;
+
+  signal Fred : ARecType( A(7 downto 0)) ;
+begin
+  test_1 : test 
+    port map (
+      input => Fred 
+    );
+  
+  process 
+  begin 
+    Fred.A <= X"00" ;
+    wait for 1 ns ;
+    for i in 1 to 10 loop
+      Fred.A <= X"00" + i ; 
+      wait for 1 ns ;
+    end loop ;
+    std.env.stop ;
+  end process ; 
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2g_record_alias_port/Test.vhd b/testsuite/gna/issue641/test_2g_record_alias_port/Test.vhd
new file mode 100644
index 000000000..939aae531
--- /dev/null
+++ b/testsuite/gna/issue641/test_2g_record_alias_port/Test.vhd
@@ -0,0 +1,33 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.TestPkg.all ;
+
+entity test is
+  port(
+    input : in ARecType 
+  );
+end entity;
+
+architecture rtl of test is
+  alias B is input ; 
+
+  signal copy : input'subtype;   
+  
+--  The following all fail, but the following error
+-- .\tbtest:error: bound check failure at ../../src/ieee2008/std_logic_1164-body.vhdl:905
+--  alias B : ARecType(A(input.A'range)) is input ;  
+--  alias B : ARecType(A(7 downto 0)) is input ;  
+--  subtype BType is ARecType(A(7 downto 0)) ;
+--  alias B : BType is input ;
+begin
+  copy <= input ;
+  
+  process 
+  begin 
+    wait on copy ;  -- Suppress first run
+    report "Copy.A, B.A = " & to_hstring(Copy.A) & ", " & to_hstring(B.A) ; 
+  end process ; 
+  
+end architecture;
\ No newline at end of file
diff --git a/testsuite/gna/issue641/test_2g_record_alias_port/TestPkg.vhd b/testsuite/gna/issue641/test_2g_record_alias_port/TestPkg.vhd
new file mode 100644
index 000000000..24eeaabf4
--- /dev/null
+++ b/testsuite/gna/issue641/test_2g_record_alias_port/TestPkg.vhd
@@ -0,0 +1,10 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+package TestPkg is
+  type ARecType is record
+    A : unsigned ;
+  end record ARecType ; 
+
+end package TestPkg ; 
diff --git a/testsuite/gna/issue641/test_2g_record_alias_port/test_2g_record_alias_port.pro b/testsuite/gna/issue641/test_2g_record_alias_port/test_2g_record_alias_port.pro
new file mode 100644
index 000000000..e93963344
--- /dev/null
+++ b/testsuite/gna/issue641/test_2g_record_alias_port/test_2g_record_alias_port.pro
@@ -0,0 +1,6 @@
+library default
+
+analyze TestPkg.vhd
+analyze Test.vhd
+analyze TbTest.vhd
+simulate TbTest
\ No newline at end of file
diff --git a/testsuite/gna/issue641/testsuite.sh b/testsuite/gna/issue641/testsuite.sh
index 88a030c79..2c95e8cb3 100755
--- a/testsuite/gna/issue641/testsuite.sh
+++ b/testsuite/gna/issue641/testsuite.sh
@@ -15,10 +15,66 @@ clean
 
 # From synthworks
 
+analyze test_1a_unsigned_port/TestPkg.vhd
+analyze test_1a_unsigned_port/Test.vhd
+analyze test_1a_unsigned_port/TbTest.vhd
+elab_simulate TbTest
+
+clean
+
+analyze test_1b_unsigned_alias/TestPkg.vhd
+analyze test_1b_unsigned_alias/Test.vhd
+analyze test_1b_unsigned_alias/TbTest.vhd
+elab_simulate TbTest
+
+clean
+
+analyze test_2a_record_subtype/TestPkg.vhd
+analyze test_2a_record_subtype/Test.vhd
+analyze test_2a_record_subtype/TbTest.vhd
+elab_simulate TbTest
+
+clean
+
 analyze test_2b_record_subtype_alias/TestPkg.vhd
 analyze test_2b_record_subtype_alias/Test.vhd
 analyze test_2b_record_subtype_alias/TbTest.vhd
-simulate TbTest
+elab_simulate TbTest
+
+clean
+
+analyze test_2c_record_range_alias/TestPkg.vhd
+analyze test_2c_record_range_alias/Test.vhd
+analyze test_2c_record_range_alias/TbTest.vhd
+elab_simulate TbTest
+
+clean
+
+analyze test_2d_record_subtype_length_decl/TestPkg.vhd
+analyze test_2d_record_subtype_length_decl/Test.vhd
+analyze test_2d_record_subtype_length_decl/TbTest.vhd
+elab_simulate TbTest
+
+clean
+
+analyze test_2e_record_simple_alias/TestPkg.vhd
+analyze test_2e_record_simple_alias/Test.vhd
+analyze test_2e_record_simple_alias/TbTest.vhd
+elab_simulate TbTest
+
+clean
+
+analyze test_2f_record_constrained_alias/TestPkg.vhd
+analyze test_2f_record_constrained_alias/Test.vhd
+analyze test_2f_record_constrained_alias/TbTest.vhd
+elab_simulate TbTest
+
+clean
+
+analyze test_2g_record_alias_port/TestPkg.vhd
+analyze test_2g_record_alias_port/Test.vhd
+analyze test_2g_record_alias_port/TbTest.vhd
+elab_simulate TbTest
 
 clean