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author | Tristan Gingold <tgingold@free.fr> | 2019-10-01 20:03:23 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-10-01 20:03:23 +0200 |
commit | 26230727356dfe9533b28166ace0f32c478600fb (patch) | |
tree | b8b21260076fa4c85e906eda11d4f4064e73c413 /testsuite/synth | |
parent | 808bc3fc0865eb9174f9ad35fe2f96de953c2522 (diff) | |
download | ghdl-26230727356dfe9533b28166ace0f32c478600fb.tar.gz ghdl-26230727356dfe9533b28166ace0f32c478600fb.tar.bz2 ghdl-26230727356dfe9533b28166ace0f32c478600fb.zip |
testsuite/synth: add testcase for previous commit
Diffstat (limited to 'testsuite/synth')
-rw-r--r-- | testsuite/synth/aggr01/aggr03.vhdl | 15 | ||||
-rw-r--r-- | testsuite/synth/aggr01/tb_aggr03.vhdl | 29 | ||||
-rwxr-xr-x | testsuite/synth/aggr01/testsuite.sh | 2 | ||||
-rw-r--r-- | testsuite/synth/issue945/syn_ent.vhdl | 13 |
4 files changed, 45 insertions, 14 deletions
diff --git a/testsuite/synth/aggr01/aggr03.vhdl b/testsuite/synth/aggr01/aggr03.vhdl new file mode 100644 index 000000000..4d20a2730 --- /dev/null +++ b/testsuite/synth/aggr01/aggr03.vhdl @@ -0,0 +1,15 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity aggr03 is + port (a : std_logic_vector (7 downto 0); + b : out std_logic_vector (7 downto 0)); +end aggr03; + +architecture rtl of aggr03 is + signal r : std_logic_vector (7 downto 0); +begin + b <= r or a; + + r <= (7 downto 2 => '0', others => '1'); +end rtl; diff --git a/testsuite/synth/aggr01/tb_aggr03.vhdl b/testsuite/synth/aggr01/tb_aggr03.vhdl new file mode 100644 index 000000000..4f4687041 --- /dev/null +++ b/testsuite/synth/aggr01/tb_aggr03.vhdl @@ -0,0 +1,29 @@ +entity tb_aggr03 is +end tb_aggr03; + +library ieee; +use ieee.std_logic_1164.all; + +architecture behav of tb_aggr03 is + signal a, b : std_logic_vector(7 downto 0); +begin + dut: entity work.aggr03 + port map (a, b); + + process + begin + a <= x"ff"; + wait for 1 ns; + assert b = x"ff" severity failure; + + a <= x"ee"; + wait for 1 ns; + assert b = x"ef" severity failure; + + a <= x"50"; + wait for 1 ns; + assert b = x"53" severity failure; + + wait; + end process; +end behav; diff --git a/testsuite/synth/aggr01/testsuite.sh b/testsuite/synth/aggr01/testsuite.sh index 6086ad422..762099e42 100755 --- a/testsuite/synth/aggr01/testsuite.sh +++ b/testsuite/synth/aggr01/testsuite.sh @@ -2,7 +2,7 @@ . ../../testenv.sh -for t in aggr01 aggr02; do +for t in aggr01 aggr02 aggr03; do analyze $t.vhdl tb_$t.vhdl elab_simulate tb_$t clean diff --git a/testsuite/synth/issue945/syn_ent.vhdl b/testsuite/synth/issue945/syn_ent.vhdl deleted file mode 100644 index 3477d2338..000000000 --- a/testsuite/synth/issue945/syn_ent.vhdl +++ /dev/null @@ -1,13 +0,0 @@ -entity ent is -end ent; - -library ieee; -use ieee.std_logic_1164.all; -use ieee.numeric_std.all; - -architecture rtl of ent is - signal test : std_logic; -begin - -- ent.vhdl:5:12 - test <= <unassigned>; -- (signal) -end rtl; |