diff options
author | Tristan Gingold <tgingold@free.fr> | 2019-09-25 20:39:46 +0200 |
---|---|---|
committer | Tristan Gingold <tgingold@free.fr> | 2019-09-25 20:39:46 +0200 |
commit | 6e9336d11dfc4f53dba234e1f02a2b0172461e0c (patch) | |
tree | 12f93ed2cbbb62c0e8e2fb6b7124201fe0a216bd /testsuite/synth/synth40 | |
parent | dcc353b07b82a84f2aa598de3884c58f406e0652 (diff) | |
download | ghdl-6e9336d11dfc4f53dba234e1f02a2b0172461e0c.tar.gz ghdl-6e9336d11dfc4f53dba234e1f02a2b0172461e0c.tar.bz2 ghdl-6e9336d11dfc4f53dba234e1f02a2b0172461e0c.zip |
testsuite/synth: rename issueXX to synthXX for ghdlsynth-beta issues.
Diffstat (limited to 'testsuite/synth/synth40')
-rw-r--r-- | testsuite/synth/synth40/tb_testcase.vhdl | 26 | ||||
-rw-r--r-- | testsuite/synth/synth40/testcase.vhdl | 17 | ||||
-rwxr-xr-x | testsuite/synth/synth40/testsuite.sh | 18 |
3 files changed, 61 insertions, 0 deletions
diff --git a/testsuite/synth/synth40/tb_testcase.vhdl b/testsuite/synth/synth40/tb_testcase.vhdl new file mode 100644 index 000000000..3ed89e61c --- /dev/null +++ b/testsuite/synth/synth40/tb_testcase.vhdl @@ -0,0 +1,26 @@ +entity tb_testcase is +end tb_testcase; + +library ieee; +use ieee.std_logic_1164.all; + +architecture behav of tb_testcase is + signal di : std_logic; + signal do : std_logic; +begin + dut: entity work.testcase + port map (data_in => di, data_out => do); + + process + begin + di <= '1'; + wait for 1 ns; + assert do = '0' severity failure; + + di <= '0'; + wait for 1 ns; + assert do = '1' severity failure; + + wait; + end process; +end behav; diff --git a/testsuite/synth/synth40/testcase.vhdl b/testsuite/synth/synth40/testcase.vhdl new file mode 100644 index 000000000..8055fac85 --- /dev/null +++ b/testsuite/synth/synth40/testcase.vhdl @@ -0,0 +1,17 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity testcase is + port( + data_in : in std_ulogic; + data_out : out std_ulogic + ); +end entity testcase; + +architecture behaviour of testcase is +begin + comb : process(all) + begin + data_out <= '1' when data_in = '0' else '0'; + end process; +end architecture behaviour; diff --git a/testsuite/synth/synth40/testsuite.sh b/testsuite/synth/synth40/testsuite.sh new file mode 100755 index 000000000..54d4ea0ed --- /dev/null +++ b/testsuite/synth/synth40/testsuite.sh @@ -0,0 +1,18 @@ +#! /bin/sh + +. ../../testenv.sh + +GHDL_STD_FLAGS=--std=08 + +for t in testcase; do + analyze $t.vhdl tb_$t.vhdl + elab_simulate tb_$t + clean + + synth $t.vhdl -e $t > syn_$t.vhdl + analyze syn_$t.vhdl tb_$t.vhdl + elab_simulate tb_$t + clean +done + +echo "Test successful" |