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authorTristan Gingold <tgingold@free.fr>2019-09-30 20:58:35 +0200
committerTristan Gingold <tgingold@free.fr>2019-09-30 20:58:35 +0200
commit88d594c84f6b07f312f9fa0a2c2403b81d9ca35d (patch)
treefd8b7b22f145c1d5660f1123cd9579451e1b4256 /testsuite/synth/issue953/ent.vhdl
parent9aeab4488aef1a576d648ce2a14d3bc3a893f1e6 (diff)
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testsuite/synth: add testcase for #953
Diffstat (limited to 'testsuite/synth/issue953/ent.vhdl')
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diff --git a/testsuite/synth/issue953/ent.vhdl b/testsuite/synth/issue953/ent.vhdl
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+library ieee;
+use ieee.std_logic_1164.all,
+ ieee.numeric_std.all;
+
+entity ent is
+end;
+
+architecture a of ent is
+ signal x : unsigned(7 downto 0);
+ signal y : unsigned(7 downto 0) := x / 2;
+ signal z : unsigned(15 downto 0) := x * 2;
+begin
+end;