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authorTristan Gingold <tgingold@free.fr>2022-05-17 06:12:18 +0200
committerTristan Gingold <tgingold@free.fr>2022-05-17 06:26:06 +0200
commit9728189783f10b3acaa082121100cc9571065a77 (patch)
tree750669dffb8e77ba541c6b9e86e84f79c4ef4db2 /testsuite/synth/issue2062/fxt.vhdl
parent8c55533f130157e826c94a92f55200b916d980f5 (diff)
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testsuite/synth: add a test for #2062
Diffstat (limited to 'testsuite/synth/issue2062/fxt.vhdl')
-rw-r--r--testsuite/synth/issue2062/fxt.vhdl15
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diff --git a/testsuite/synth/issue2062/fxt.vhdl b/testsuite/synth/issue2062/fxt.vhdl
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+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.fixed_pkg.all;
+
+entity fxt is port (
+ a : in std_logic_vector(6 downto 0);
+ y : out ufixed(3 downto -2));
+end entity;
+
+architecture beh of fxt is
+begin
+ y <= to_ufixed(a, 5, 1);
+end beh;