testsuite/synth: add tests for #1273

6 files changed, 129 insertions, 0 deletions

diff --git a/testsuite/synth/issue1273/assert2.vhdl b/testsuite/synth/issue1273/assert2.vhdl
new file mode 100644
index 000000000..48843d0e9
--- /dev/null
+++ b/testsuite/synth/issue1273/assert2.vhdl
@@ -0,0 +1,19 @@
+entity assert2 is
+  port (v : natural;
+        en : boolean;
+        res : out natural);
+end assert2;
+
+architecture behav of assert2 is
+begin
+  process (v, en)
+  begin
+    if en then
+      assert v < 10 report "bad v value";
+      res <= v + 1;
+    else
+      res <= 0;
+    end if;
+  end process;
+end behav;
+
diff --git a/testsuite/synth/issue1273/assert3.vhdl b/testsuite/synth/issue1273/assert3.vhdl
new file mode 100644
index 000000000..31568145a
--- /dev/null
+++ b/testsuite/synth/issue1273/assert3.vhdl
@@ -0,0 +1,26 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity assert3 is
+  port (v : std_logic_Vector (7 downto 0);
+        en : std_logic;
+        res : out natural);
+end;
+
+architecture behav of assert3 is
+begin
+  process (v, en)
+  begin
+    res <= 0;
+    if en = '1' then
+      for i in v'range loop
+        if v (i) = '1' then
+          res <= i;
+          exit;
+        end if;
+        assert i > 3 report "bad v value";
+      end loop;
+    end if;
+  end process;
+end behav;
+
diff --git a/testsuite/synth/issue1273/issue.vhdl b/testsuite/synth/issue1273/issue.vhdl
new file mode 100644
index 000000000..b737e20a6
--- /dev/null
+++ b/testsuite/synth/issue1273/issue.vhdl
@@ -0,0 +1,16 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity issue is
+    port (foo : in  std_logic);
+end entity issue;
+
+architecture beh of issue is
+    procedure check (arg : in std_logic) is
+    begin
+        assert (arg xor '1') = (arg and '0');
+    end procedure;
+begin
+    check (foo);
+    --assert (foo xor '1') = (foo and '0');
+end architecture;
diff --git a/testsuite/synth/issue1273/tb_assert2.vhdl b/testsuite/synth/issue1273/tb_assert2.vhdl
new file mode 100644
index 000000000..2f34f8fd0
--- /dev/null
+++ b/testsuite/synth/issue1273/tb_assert2.vhdl
@@ -0,0 +1,27 @@
+entity tb_assert2 is
+end tb_assert2;
+
+architecture behav of tb_assert2 is
+  signal v, res : natural;
+  signal en : boolean := false;
+begin
+  dut: entity work.assert2
+    port map (v, en, res);
+
+  process
+  begin
+    en <= True;
+    v <= 2;
+    wait for 1 ns;
+    assert res = 3 severity failure;
+
+    v <= 11;
+    en <= False;
+    wait for 1 ns;
+    assert res = 0 severity failure;
+
+--    wait for 10 ns;
+--    en <= True;
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/synth/issue1273/tb_assert3.vhdl b/testsuite/synth/issue1273/tb_assert3.vhdl
new file mode 100644
index 000000000..2ad3d0572
--- /dev/null
+++ b/testsuite/synth/issue1273/tb_assert3.vhdl
@@ -0,0 +1,32 @@
+entity tb_assert3 is
+end tb_assert3;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tb_assert3 is
+  signal v : std_logic_Vector (7 downto 0);
+  signal en : std_logic := '0';
+  signal res : natural;
+begin
+  dut: entity work.assert3
+    port map (v, en, res);
+
+  process
+  begin
+    wait for 1 ns;
+
+    en <= '1';
+    v <= b"0010_0000";
+    wait for 1 ns;
+    assert res = 5 severity failure;
+
+    --  Trigger an error.
+    en <= '1';
+    v <= b"0000_0010";
+    wait for 1 ns;
+    assert res = 1 severity failure;
+
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/synth/issue1273/testsuite.sh b/testsuite/synth/issue1273/testsuite.sh
new file mode 100755
index 000000000..5dceb56ee
--- /dev/null
+++ b/testsuite/synth/issue1273/testsuite.sh
@@ -0,0 +1,9 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+synth_analyze issue
+synth_tb assert2
+synth_tb assert3
+
+echo "Test successful"