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author | Tristan Gingold <tgingold@free.fr> | 2019-11-29 07:53:34 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-11-29 07:53:34 +0100 |
commit | b76ab2eda6f80560c93b1259b798f0113b32c859 (patch) | |
tree | 54efd6e96f45b52d96f44d4fd0e9b2f9ce370229 /testsuite/synth/issue1041/ent.vhdl | |
parent | 143d372c82f5f7a273904fef4d407384ba0abe85 (diff) | |
download | ghdl-b76ab2eda6f80560c93b1259b798f0113b32c859.tar.gz ghdl-b76ab2eda6f80560c93b1259b798f0113b32c859.tar.bz2 ghdl-b76ab2eda6f80560c93b1259b798f0113b32c859.zip |
testsuite: add case for #1041
Diffstat (limited to 'testsuite/synth/issue1041/ent.vhdl')
-rw-r--r-- | testsuite/synth/issue1041/ent.vhdl | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/testsuite/synth/issue1041/ent.vhdl b/testsuite/synth/issue1041/ent.vhdl new file mode 100644 index 000000000..d6b40a1f8 --- /dev/null +++ b/testsuite/synth/issue1041/ent.vhdl @@ -0,0 +1,38 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity ent is + port ( + reset : in std_logic; + clk : in std_logic + ); +end ent; + +architecture rtl of ent is + function const return natural is + begin + return 1; + end const; + + constant MAX_COUNT : natural := const; + signal countdown : natural; + + signal x : std_logic; + signal y : std_logic; +begin + x <= '1'; + y <= '1'; + + process(reset, clk) + begin + if reset then + countdown <= MAX_COUNT; + elsif rising_edge(clk) then + if x then + if y then + countdown <= MAX_COUNT; + end if; + end if; + end if; + end process; +end rtl; |