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authorTristan Gingold <tgingold@free.fr>2019-08-14 07:29:25 +0200
committerTristan Gingold <tgingold@free.fr>2019-08-14 07:29:25 +0200
commitf2bb88484488ec158562399a213498a15a8599f9 (patch)
treee7fb6629bfebb964fe242ecc8098629b8645db1d /testsuite/gna/perf02-long/mul_146.vhd
parentf19c700de1543f6c02f5ced17d79bf7a4f37e3f8 (diff)
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testsuite/gna: rename perf02 to not run it normally.
Diffstat (limited to 'testsuite/gna/perf02-long/mul_146.vhd')
-rw-r--r--testsuite/gna/perf02-long/mul_146.vhd27
1 files changed, 27 insertions, 0 deletions
diff --git a/testsuite/gna/perf02-long/mul_146.vhd b/testsuite/gna/perf02-long/mul_146.vhd
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+++ b/testsuite/gna/perf02-long/mul_146.vhd
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+library ieee;
+use ieee.std_logic_1164.all;
+
+library ieee;
+use ieee.numeric_std.all;
+
+entity mul_146 is
+ port (
+ output : out std_logic_vector(63 downto 0);
+ in_a : in std_logic_vector(63 downto 0);
+ in_b : in std_logic_vector(31 downto 0)
+ );
+end mul_146;
+
+architecture augh of mul_146 is
+
+ signal tmp_res : signed(95 downto 0);
+
+begin
+
+ -- The actual multiplication
+ tmp_res <= signed(in_a) * signed(in_b);
+
+ -- Set the output
+ output <= std_logic_vector(tmp_res(63 downto 0));
+
+end architecture;