testsuite/gna: add a test for #916

1 files changed, 24 insertions, 0 deletions

diff --git a/testsuite/gna/issue916/dut.vhdl b/testsuite/gna/issue916/dut.vhdl
new file mode 100644
index 000000000..8d11c0b42
--- /dev/null
+++ b/testsuite/gna/issue916/dut.vhdl
@@ -0,0 +1,24 @@
+library ieee;
+use ieee.std_logic_1164.all;
+entity avmm_csr is
+	Port (
+		reg_i : in std_ulogic_vector
+    );
+end avmm_csr;
+architecture rtl of avmm_csr is
+begin
+end rtl;
+
+
+library ieee;
+use ieee.numeric_std_unsigned.all;
+entity dut is
+end entity dut;
+architecture rtl of dut is
+    signal int : natural;
+begin
+    inst : entity work.avmm_csr
+    port map (
+        reg_i           => to_slv(int, 2)
+    );
+end architecture rtl;