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author | Tristan Gingold <tgingold@free.fr> | 2021-09-12 10:17:00 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2021-09-12 10:17:00 +0200 |
commit | 0277de7a78cc62abd3d1a17e1cdc754da7f55361 (patch) | |
tree | 2cc724faafa74c34fe3013c6516aa76983b3ba0c /testsuite/gna/issue873 | |
parent | 7dada3d5edce113d1dd29a9587447d2fd9c40067 (diff) | |
download | ghdl-0277de7a78cc62abd3d1a17e1cdc754da7f55361.tar.gz ghdl-0277de7a78cc62abd3d1a17e1cdc754da7f55361.tar.bz2 ghdl-0277de7a78cc62abd3d1a17e1cdc754da7f55361.zip |
testsuite/gna: add a test for #873
Diffstat (limited to 'testsuite/gna/issue873')
-rw-r--r-- | testsuite/gna/issue873/tb.vhdl | 40 | ||||
-rwxr-xr-x | testsuite/gna/issue873/testsuite.sh | 9 |
2 files changed, 49 insertions, 0 deletions
diff --git a/testsuite/gna/issue873/tb.vhdl b/testsuite/gna/issue873/tb.vhdl new file mode 100644 index 000000000..bdd091394 --- /dev/null +++ b/testsuite/gna/issue873/tb.vhdl @@ -0,0 +1,40 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity dummy is + generic ( + LENGTH : natural); + port ( + A : in std_logic_vector (LENGTH - 1 downto 0); + Q : out std_logic); +end entity; + +architecture rtl of dummy is + +begin + + Q <= A(0); + +end rtl; + +library ieee; +use ieee.std_logic_1164.all; + +entity tb is +end tb; + +architecture rtl of tb is + + signal x : std_logic; + +begin + x <= '0'; + + dummy_i: entity work.dummy + generic map ( + LENGTH => 1) + port map ( + A => std_logic_vector(x), + Q => open); + +end architecture; diff --git a/testsuite/gna/issue873/testsuite.sh b/testsuite/gna/issue873/testsuite.sh new file mode 100755 index 000000000..8a9a6eed3 --- /dev/null +++ b/testsuite/gna/issue873/testsuite.sh @@ -0,0 +1,9 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze_failure tb.vhdl + +clean + +echo "Test successful" |