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authorTristan Gingold <tgingold@free.fr>2017-06-12 05:38:52 +0200
committerTristan Gingold <tgingold@free.fr>2017-06-12 05:38:52 +0200
commit15f250b53c21dc9898126d9476edb4322cdbb6b4 (patch)
tree3a15e42b4cceaf34f3279c8a3385f529e562d99b /testsuite/gna/issue301/repro.vhdl
parentd986b9af22f4e927e887f1bd6f9ff5174dde4aca (diff)
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Add reproducer for #301
Diffstat (limited to 'testsuite/gna/issue301/repro.vhdl')
-rw-r--r--testsuite/gna/issue301/repro.vhdl40
1 files changed, 40 insertions, 0 deletions
diff --git a/testsuite/gna/issue301/repro.vhdl b/testsuite/gna/issue301/repro.vhdl
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--- /dev/null
+++ b/testsuite/gna/issue301/repro.vhdl
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+package pkgc is
+ constant width : natural;
+end pkgc;
+
+package body pkgc is
+ constant width : natural := 4;
+end pkgc;
+
+use work.pkgc.all;
+package pkgcomp is
+ component comp is
+ generic (val : bit_vector (width -1 downto 0));
+ port (b : out bit);
+ end component;
+end pkgcomp;
+
+use work.pkgc.all;
+entity comp is
+ generic (val : bit_vector (width -1 downto 0));
+ port (b : out bit);
+end comp;
+
+architecture behav of comp is
+begin
+ b <= val (val'left);
+end behav;
+
+entity repro is
+end repro;
+
+use work.pkgc.all;
+use work.pkgcomp.all;
+
+architecture behav of repro is
+ signal res : bit;
+begin
+ inst : comp
+ generic map (val => "0010")
+ port map (b => res );
+end behav;