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| author | Tristan Gingold <tgingold@free.fr> | 2019-11-25 06:54:56 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-11-25 06:54:56 +0100 |
| commit | 2733fd6535cfd10c64ff8383bc1df890faaf076c (patch) | |
| tree | d010288f4fb962247e683111fadfcd1e3b58ffc1 /testsuite/gna/issue265/ex1_entity.vhdl | |
| parent | 8a2bd07c3f7a3f99aa3cf0017dbba69df28aa1b9 (diff) | |
| download | ghdl-2733fd6535cfd10c64ff8383bc1df890faaf076c.tar.gz ghdl-2733fd6535cfd10c64ff8383bc1df890faaf076c.tar.bz2 ghdl-2733fd6535cfd10c64ff8383bc1df890faaf076c.zip | |
testsuite: add a reproducer for #265
Diffstat (limited to 'testsuite/gna/issue265/ex1_entity.vhdl')
| -rw-r--r-- | testsuite/gna/issue265/ex1_entity.vhdl | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/testsuite/gna/issue265/ex1_entity.vhdl b/testsuite/gna/issue265/ex1_entity.vhdl new file mode 100644 index 000000000..fef4f6eaf --- /dev/null +++ b/testsuite/gna/issue265/ex1_entity.vhdl @@ -0,0 +1,12 @@ +library IEEE; +use IEEE.std_logic_1164.all; + +entity ex1_entity is + port ( + X : inout std_logic + ); +end entity; + +architecture a of ex1_entity is +begin +end architecture; |