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| author | Tristan Gingold <tgingold@free.fr> | 2021-11-21 17:35:11 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2021-11-21 17:35:11 +0100 |
| commit | ba783ea097c47e1b5ec9fdfcd5f6dcc202ab00d4 (patch) | |
| tree | 6c21ea724515f10b228fc764edc2b3eff879e107 /testsuite/gna/issue1919/repro.vhdl | |
| parent | db8354e41521bc803bf1c832f679780a1bf2fbb2 (diff) | |
| download | ghdl-ba783ea097c47e1b5ec9fdfcd5f6dcc202ab00d4.tar.gz ghdl-ba783ea097c47e1b5ec9fdfcd5f6dcc202ab00d4.tar.bz2 ghdl-ba783ea097c47e1b5ec9fdfcd5f6dcc202ab00d4.zip | |
testsuite/gna: add a test for #1919
Diffstat (limited to 'testsuite/gna/issue1919/repro.vhdl')
| -rw-r--r-- | testsuite/gna/issue1919/repro.vhdl | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/testsuite/gna/issue1919/repro.vhdl b/testsuite/gna/issue1919/repro.vhdl new file mode 100644 index 000000000..64ab6ee11 --- /dev/null +++ b/testsuite/gna/issue1919/repro.vhdl @@ -0,0 +1,6 @@ +library ieee; +use ieee.std_logic_1164.all; + +package repro is + alias reg_Acc : std_logic_vector(3 downto 0) is "0111"; +end repro; |