testsuite/gna: add test for #1672

1 files changed, 22 insertions, 0 deletions

diff --git a/testsuite/gna/issue1672/test.vhdl b/testsuite/gna/issue1672/test.vhdl
new file mode 100644
index 000000000..c3fc5f13f
--- /dev/null
+++ b/testsuite/gna/issue1672/test.vhdl
@@ -0,0 +1,22 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity test is
+end entity;
+
+architecture a of test is
+
+  constant num_ports : positive := 4;
+  signal clock : std_logic := '0';
+
+begin
+
+  dut_inst : entity work.dut
+    generic map (
+      num_ports => num_ports
+    )
+    port map (
+      clocks => (others => clock)
+    );
+
+end architecture;