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authorTristan Gingold <tgingold@free.fr>2020-08-05 18:33:55 +0200
committerTristan Gingold <tgingold@free.fr>2020-08-05 18:33:55 +0200
commit90184a346889e3d9392fba6f71829b0a8893d70c (patch)
treeb943b6efe200230cd421606476c65c22e9bc9d57 /testsuite/gna/issue1131/repro1.vhdl
parent7a4c217d9a21bf241c8760750bd10408c7855f35 (diff)
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testsuite/gna: add a test for #1131
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diff --git a/testsuite/gna/issue1131/repro1.vhdl b/testsuite/gna/issue1131/repro1.vhdl
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+entity repro1 is
+ generic (
+ BUS_WIDTH : integer := 8);
+end entity;
+
+architecture Behav of repro1 is
+ type BusT is record
+ A : bit_vector;
+ F : bit_vector;
+ end record;
+
+ signal BusInst : BusT(
+ A(BUS_WIDTH-1 downto 0),
+ F(3 downto 0)
+ );
+begin
+
+end architecture;