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| author | Tristan Gingold <tgingold@free.fr> | 2019-09-30 20:57:50 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-09-30 20:57:50 +0200 |
| commit | fce1061ee2be3198b7fe323f15092f473ae53919 (patch) | |
| tree | 3131ce8aee651bbbc105333a5c8b7027ac7c8325 /src | |
| parent | 5b00e825e9befedcfe0806d380218286ddce42ce (diff) | |
| download | ghdl-fce1061ee2be3198b7fe323f15092f473ae53919.tar.gz ghdl-fce1061ee2be3198b7fe323f15092f473ae53919.tar.bz2 ghdl-fce1061ee2be3198b7fe323f15092f473ae53919.zip | |
vhdl: recognize div operators.
Diffstat (limited to 'src')
| -rw-r--r-- | src/vhdl/vhdl-ieee-numeric.adb | 20 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 7 |
2 files changed, 27 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-ieee-numeric.adb b/src/vhdl/vhdl-ieee-numeric.adb index c7b53a38b..c33a2c8e0 100644 --- a/src/vhdl/vhdl-ieee-numeric.adb +++ b/src/vhdl/vhdl-ieee-numeric.adb @@ -94,6 +94,24 @@ package body Vhdl.Ieee.Numeric is (others => (others => Iir_Predefined_None))); + Div_Patterns : constant Binary_Pattern_Type := + (Pkg_Std => + (Type_Unsigned => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Div_Uns_Uns, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Div_Uns_Nat, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Div_Nat_Uns, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None), + Type_Signed => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Div_Sgn_Sgn, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Div_Sgn_Int, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Div_Int_Sgn, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None)), + Pkg_Bit => + (others => + (others => Iir_Predefined_None))); + Eq_Patterns : constant Binary_Pattern_Type := (Pkg_Std => (Type_Unsigned => @@ -590,6 +608,8 @@ package body Vhdl.Ieee.Numeric is Handle_Binary (Sub_Patterns); when Name_Op_Mul => Handle_Binary (Mul_Patterns); + when Name_Op_Div => + Handle_Binary (Div_Patterns); when Name_Op_Equality => Handle_Binary (Eq_Patterns); when Name_Op_Inequality => diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 27ec94448..6d0bca05a 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -4958,6 +4958,13 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_Mul_Sgn_Int, Iir_Predefined_Ieee_Numeric_Std_Mul_Int_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Div_Uns_Uns, + Iir_Predefined_Ieee_Numeric_Std_Div_Uns_Nat, + Iir_Predefined_Ieee_Numeric_Std_Div_Nat_Uns, + Iir_Predefined_Ieee_Numeric_Std_Div_Sgn_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Div_Sgn_Int, + Iir_Predefined_Ieee_Numeric_Std_Div_Int_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Gt_Uns_Uns, Iir_Predefined_Ieee_Numeric_Std_Gt_Uns_Nat, Iir_Predefined_Ieee_Numeric_Std_Gt_Nat_Uns, |