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author | Tristan Gingold <tgingold@free.fr> | 2022-07-27 05:06:45 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-07-27 05:07:09 +0200 |
commit | fb11d0a46b5b1b747e2014f2bce6d30ba93bf760 (patch) | |
tree | 57f01beeb3cc7912787dd46ad8750ff418fad1b4 /src | |
parent | 302435d44675ed5320c87ffd16f26f1ef02170d5 (diff) | |
download | ghdl-fb11d0a46b5b1b747e2014f2bce6d30ba93bf760.tar.gz ghdl-fb11d0a46b5b1b747e2014f2bce6d30ba93bf760.tar.bz2 ghdl-fb11d0a46b5b1b747e2014f2bce6d30ba93bf760.zip |
netlists-disp_vhdl: adjust output for #2140
Diffstat (limited to 'src')
-rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index 2898d8b43..50cdbfd10 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -122,6 +122,7 @@ package body Netlists.Disp_Vhdl is Inst : constant Instance := Get_Net_Parent (N); Idx : constant Port_Idx := Get_Port_Idx (N); M : Module; + Id : Module_Id; Inst_Name : Sname; Port_Name : Sname; begin @@ -132,14 +133,19 @@ package body Netlists.Disp_Vhdl is Inst_Name := Get_Instance_Name (Inst); Put_Name (Inst_Name); M := Get_Module (Inst); - case Get_Id (M) is + Id := Get_Id (M); + case Id is when Id_Signal | Id_Isignal => -- No suffix for signals (it's 'o'). null; when others => Port_Name := Get_Output_Desc (M, Idx).Name; - Put ("_c_"); + if Id >= Id_User_None then + Put ("_c_"); + else + Put ("_"); + end if; Put_Interface_Name (Port_Name); end case; end if; |