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| author | Tristan Gingold <tgingold@free.fr> | 2020-03-21 17:15:13 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-03-21 17:15:13 +0100 |
| commit | e63bc8249ddfca1176b72f038ba8b9fa12b0f38c (patch) | |
| tree | 2beb6556e5c926c14c17c8067e8f474f32be4da7 /src | |
| parent | 234741f30661bbf2806fda277b6f16dbfb1a8c1c (diff) | |
| download | ghdl-e63bc8249ddfca1176b72f038ba8b9fa12b0f38c.tar.gz ghdl-e63bc8249ddfca1176b72f038ba8b9fa12b0f38c.tar.bz2 ghdl-e63bc8249ddfca1176b72f038ba8b9fa12b0f38c.zip | |
vhdl: recognize minimum/maximum in numeric_std. For #1168
Diffstat (limited to 'src')
| -rw-r--r-- | src/vhdl/vhdl-ieee-numeric.adb | 40 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 14 |
2 files changed, 54 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-ieee-numeric.adb b/src/vhdl/vhdl-ieee-numeric.adb index f03ac61d4..8f94b8fde 100644 --- a/src/vhdl/vhdl-ieee-numeric.adb +++ b/src/vhdl/vhdl-ieee-numeric.adb @@ -256,6 +256,42 @@ package body Vhdl.Ieee.Numeric is (others => (others => Iir_Predefined_None))); + Min_Patterns : constant Binary_Pattern_Type := + (Pkg_Std => + (Type_Unsigned => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Min_Uns_Uns, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Min_Uns_Nat, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Min_Nat_Uns, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None), + Type_Signed => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Min_Sgn_Sgn, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Min_Sgn_Int, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Min_Int_Sgn, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None)), + Pkg_Bit => + (others => + (others => Iir_Predefined_None))); + + Max_Patterns : constant Binary_Pattern_Type := + (Pkg_Std => + (Type_Unsigned => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Max_Uns_Uns, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Max_Uns_Nat, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Max_Nat_Uns, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None), + Type_Signed => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Max_Sgn_Sgn, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Max_Sgn_Int, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Max_Int_Sgn, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None)), + Pkg_Bit => + (others => + (others => Iir_Predefined_None))); + Match_Eq_Patterns : constant Binary_Pattern_Type := (Pkg_Std => (Type_Unsigned => @@ -793,6 +829,10 @@ package body Vhdl.Ieee.Numeric is Handle_Binary (Gt_Patterns); when Name_Op_Greater_Equal => Handle_Binary (Ge_Patterns); + when Name_Minimum => + Handle_Binary (Min_Patterns); + when Name_Maximum => + Handle_Binary (Max_Patterns); when Name_Op_Match_Equality => Handle_Binary (Match_Eq_Patterns); when Name_Op_Match_Inequality => diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 8be86f9dd..7c2bebd42 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5583,6 +5583,20 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_Ne_Sgn_Int, Iir_Predefined_Ieee_Numeric_Std_Ne_Int_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Min_Uns_Uns, + Iir_Predefined_Ieee_Numeric_Std_Min_Uns_Nat, + Iir_Predefined_Ieee_Numeric_Std_Min_Nat_Uns, + Iir_Predefined_Ieee_Numeric_Std_Min_Sgn_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Min_Sgn_Int, + Iir_Predefined_Ieee_Numeric_Std_Min_Int_Sgn, + + Iir_Predefined_Ieee_Numeric_Std_Max_Uns_Uns, + Iir_Predefined_Ieee_Numeric_Std_Max_Uns_Nat, + Iir_Predefined_Ieee_Numeric_Std_Max_Nat_Uns, + Iir_Predefined_Ieee_Numeric_Std_Max_Sgn_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Max_Sgn_Int, + Iir_Predefined_Ieee_Numeric_Std_Max_Int_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Match_Gt_Uns_Uns, Iir_Predefined_Ieee_Numeric_Std_Match_Gt_Uns_Nat, Iir_Predefined_Ieee_Numeric_Std_Match_Gt_Nat_Uns, |