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| author | Tristan Gingold <tgingold@free.fr> | 2019-11-23 17:32:20 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-11-23 17:32:20 +0100 |
| commit | c1e2a5e5cad68c90f47ba0bc05f2285b3ca584d0 (patch) | |
| tree | 2910295a64f7befad25fc1af22de655f5926153c /src | |
| parent | 0d126cdfbff63d3e646798543e898aa80691c074 (diff) | |
| download | ghdl-c1e2a5e5cad68c90f47ba0bc05f2285b3ca584d0.tar.gz ghdl-c1e2a5e5cad68c90f47ba0bc05f2285b3ca584d0.tar.bz2 ghdl-c1e2a5e5cad68c90f47ba0bc05f2285b3ca584d0.zip | |
synth-expr: handle aliases in subtype conversion.
Diffstat (limited to 'src')
| -rw-r--r-- | src/synth/synth-expr.adb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb index 9bb95f66a..627005a88 100644 --- a/src/synth/synth-expr.adb +++ b/src/synth/synth-expr.adb @@ -841,7 +841,8 @@ package body Synth.Expr is -- TODO: check overflow. case Val.Kind is when Value_Net - | Value_Wire => + | Value_Wire + | Value_Alias => N := Get_Net (Val); if Vtype.Drange.Is_Signed then N := Build2_Sresize |